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69cd993507
Renesas RZN1 GMAC uses three interrupts in in-kernel DTS and common snps,dwmac.yaml binding is flexible, so define precise constraint for this device. Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Romain Gantois <romain.gantois@bootlin.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250902154051.263156-4-krzysztof.kozlowski@linaro.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
76 lines
1.7 KiB
YAML
76 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/renesas,rzn1-gmac.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas GMAC
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maintainers:
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- Romain Gantois <romain.gantois@bootlin.com>
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select:
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properties:
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compatible:
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contains:
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enum:
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- renesas,r9a06g032-gmac
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- renesas,rzn1-gmac
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required:
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- compatible
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allOf:
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- $ref: snps,dwmac.yaml#
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properties:
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compatible:
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items:
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- enum:
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- renesas,r9a06g032-gmac
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- const: renesas,rzn1-gmac
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- const: snps,dwmac
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interrupts:
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maxItems: 3
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interrupt-names:
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items:
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- const: macirq
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- const: eth_wake_irq
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- const: eth_lpi
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pcs-handle:
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description:
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phandle pointing to a PCS sub-node compatible with
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renesas,rzn1-miic.yaml#
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required:
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- compatible
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r9a06g032-sysctrl.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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ethernet@44000000 {
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compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
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reg = <0x44000000 0x2000>;
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
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clock-names = "stmmaceth";
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clocks = <&sysctrl R9A06G032_HCLK_GMAC0>;
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power-domains = <&sysctrl>;
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snps,multicast-filter-bins = <256>;
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snps,perfect-filter-entries = <128>;
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tx-fifo-depth = <2048>;
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rx-fifo-depth = <4096>;
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pcs-handle = <&mii_conv1>;
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phy-mode = "mii";
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};
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...
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