Haojian Zhuang ea010e5188 clk: hi3620: add gate clock flag ...

Add missing CLK_SET_RATE_PARENT flag for gate clock.

Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>

2013-12-11 16:42:23 +08:00

..

clk-hi3620.c

clk: hi3620: add gate clock flag

2013-12-11 16:42:23 +08:00

clk.c

clk: hisilicon: add common clock support

2013-12-04 18:36:45 +08:00

clk.h

clk: hisilicon: add common clock support

2013-12-04 18:36:45 +08:00

clkgate-separated.c

clk: hisilicon: add common clock support

2013-12-04 18:36:45 +08:00

Makefile

clk: hisilicon: add common clock support

2013-12-04 18:36:45 +08:00