3 Commits

Author	SHA1	Message	Date
Alex Deucher	d766e6a393	drm/amdgpu: switch ih handling to two levels (v3) ... Newer asics have a two levels of irq ids now: client id - the IP src id - the interrupt src within the IP v2: integrated Christian's comments. v3: fix rebase fail in SI and CIK Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2017-03-29 23:53:37 -04:00
Alex Deucher	0cf3be2178	drm/amdgpu: Implement irq interfaces for CGS ... This implements the irq src registrar. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2015-08-17 16:50:09 -04:00
Alex Deucher	d38ceaf99e	drm/amdgpu: add core driver (v4) ... This adds the non-asic specific core driver code. v2: remove extra kconfig option v3: implement minor fixes from Fengguang Wu v4: fix cast in amdgpu_ucode.c Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2015-06-03 21:03:15 -04:00