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Commit Graph

22264 Commits

Author SHA1 Message Date
Arnd Bergmann
e49936d215 Devicetree changes for omaps for genpd support for v5.13
In order to move omap4/5 and dra7 to probe with devicetree data and genpd,
 we need to add the missing interconnect target module configuration for
 the drivers that do not still have it. This is similar to what we have
 already done earlier for am3 and 4 earlier.
 
 These patches are very much similar for all the three SoCs here. The dra7
 changes were already available for v5.12 merge window, but were considered
 too late to add for v5.12. The patches for omap4 and 5 follow the same
 pattern, except for PCIe that is available only on dra7.
 
 We do the changes one driver at a time, and still keep the legacy property
 for "ti,hwmods" mostly around, except for cases when already not needed.
 We will be dropping the custom property and related legacy data in a
 follow-up series.
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Merge tag 'omap-for-v5.13/dts-genpd-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Devicetree changes for omaps for genpd support for v5.13

In order to move omap4/5 and dra7 to probe with devicetree data and genpd,
we need to add the missing interconnect target module configuration for
the drivers that do not still have it. This is similar to what we have
already done earlier for am3 and 4 earlier.

These patches are very much similar for all the three SoCs here. The dra7
changes were already available for v5.12 merge window, but were considered
too late to add for v5.12. The patches for omap4 and 5 follow the same
pattern, except for PCIe that is available only on dra7.

We do the changes one driver at a time, and still keep the legacy property
for "ti,hwmods" mostly around, except for cases when already not needed.
We will be dropping the custom property and related legacy data in a
follow-up series.

* tag 'omap-for-v5.13/dts-genpd-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (53 commits)
  ARM: dts: Configure simple-pm-bus for omap5 l3
  ARM: dts: Configure simple-pm-bus for omap5 l4_cfg
  ARM: dts: Configure simple-pm-bus for omap5 l4_per
  ARM: dts: Configure simple-pm-bus for omap5 l4_wkup
  ARM: dts: Move omap5 l3-noc to a separate node
  ARM: dts: Move omap5 mmio-sram out of l3 interconnect
  ARM: dts: Configure interconnect target module for omap5 sata
  ARM: dts: Configure interconnect target module for omap5 gpmc
  ARM: dts: Configure interconnect target module for omap5 mpu
  ARM: dts: Configure interconnect target module for omap5 emif
  ARM: dts: Configure interconnect target module for omap5 dmm
  ARM: dts: Prepare for simple-pm-bus for omap4 l3
  ARM: dts: Configure simple-pm-bus for omap4 l4_cfg
  ARM: dts: Configure simple-pm-bus for omap4 l4_per
  ARM: dts: Configure simple-pm-bus for omap4 l4_wkup
  ARM: dts: Move omap4 l3-noc to a separate node
  ARM: dts: Move omap4 mmio-sram out of l3 interconnect
  ARM: dts: Configure interconnect target module for omap4 mpu
  ARM: dts: Configure interconnect target module for omap4 debugss
  ARM: dts: Configure interconnect target module for omap4 emif
  ...

Link: https://lore.kernel.org/r/pull-1617004205-537424@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 21:26:03 +02:00
Daniel Palmer
f374f25aab ARM: mstar: Add mpll to base dtsi
All of the currently known MStar/SigmaStar ARMv7 SoCs have at least
one MPLL and it seems to always be at the same place so add it to
the base dtsi.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20210301123542.2800643-4-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 12:40:55 +02:00
Daniel Palmer
a93cf651df ARM: mstar: Add the external clocks to the base dsti
All of the currently known MStar/SigmaStar ARMv7 SoCs have an "xtal"
clock input that is usually 24MHz and an "RTC xtal" that is usually 32KHz.

The xtal input has to be connected to something so it's enabled by default.

The MSC313 and MSC313E do not bring the RTC clock input out to the pins
so it's impossible to connect it. The SSC8336 does bring the input
out to the pins but it's not always actually connected to something.

The RTC node needs to always be present because in the future the nodes
for the clock muxes will refer to it even if it's not usable.

The RTC node is disabled by default and should be enabled at the board
level if the RTC input is wired up.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20210301123542.2800643-3-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 12:40:55 +02:00
Kurt Kanzenbach
6ed9269265 ARM: dts: stm32: Add PTP clock to Ethernet controller
Add the PTP clock to the Ethernet controller. Otherwise, the driver uses the
main clock to derive the PTP frequency which is not necessarily the correct one.

Tested with linuxptp on Olimex STMP1-OLinuXino-LIME2.

Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-01 11:41:00 +02:00
Arnd Bergmann
89e21e1ad9 i.MX fixes for 5.12, round 2:
- Fix a system failure on imx6qdl-phytec-pfla02 board when booting from
   SD, by adding missing vmmc supply for SD interfaces.
 - Fix address typo in i.MX8MM/Q IOMUXC_SD1_DATA0_GPIO2_IO2 definition.
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Merge tag 'imx-fixes-5.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.12, round 2:

- Fix a system failure on imx6qdl-phytec-pfla02 board when booting from
  SD, by adding missing vmmc supply for SD interfaces.
- Fix address typo in i.MX8MM/Q IOMUXC_SD1_DATA0_GPIO2_IO2 definition.

* tag 'imx-fixes-5.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx6: pbab01: Set vmmc supply for both SD interfaces
  arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0

Link: https://lore.kernel.org/r/20210330090236.GQ22955@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 11:34:06 +02:00
Arnd Bergmann
111a5a421f More fixes for omaps for v5.12-rc cycle
Two fixes for hangs, mmc slot order fix, and a voltage typo fix:
 
 - Remove unused duplicate sha2md5_fck clock node that can race with the
   OMAP4_SHA2MD5_CLKCTRL clock node for disable for unused clocks
 
 - Add aliases for omap4/5 mmc to put the slots back into the right
   order again
 
 - Fix typo for bionic voltage controllers that accidentally use mpu
   for all instances instead of mpu, core and iva
 
 - Fix random hangs for droid4 caused by missing fix from TI Android
   kernel tree to do a dummy smc call on cpuidle wakeup path
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Merge tag 'omap-for-v5.12/fixes-rc4-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

More fixes for omaps for v5.12-rc cycle

Two fixes for hangs, mmc slot order fix, and a voltage typo fix:

- Remove unused duplicate sha2md5_fck clock node that can race with the
  OMAP4_SHA2MD5_CLKCTRL clock node for disable for unused clocks

- Add aliases for omap4/5 mmc to put the slots back into the right
  order again

- Fix typo for bionic voltage controllers that accidentally use mpu
  for all instances instead of mpu, core and iva

- Fix random hangs for droid4 caused by missing fix from TI Android
  kernel tree to do a dummy smc call on cpuidle wakeup path

* tag 'omap-for-v5.12/fixes-rc4-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP4: PM: update ROM return address for OSWR and OFF
  ARM: OMAP4: Fix PMIC voltage domains for bionic
  ARM: dts: Fix moving mmc devices with aliases for omap4 & 5
  ARM: dts: Drop duplicate sha2md5_fck to fix clk_disable race

Link: https://lore.kernel.org/r/pull-1616584662-702939@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 11:33:35 +02:00
Arnd Bergmann
70a6062cc2 This pull request contains Broadcom ARM-based SoC changes for 5.12,
please pull the following:
 
 - Florian reverts the adding of the second level interrupt controller
   for HDMI BSC interrupts since they collide with the main I2C
   controller (i2c-bcm2835).
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Merge tag 'arm-soc/for-5.12/devicetree-part2' of https://github.com/Broadcom/stblinux into arm/fixes

This pull request contains Broadcom ARM-based SoC changes for 5.12,
please pull the following:

- Florian reverts the adding of the second level interrupt controller
  for HDMI BSC interrupts since they collide with the main I2C
  controller (i2c-bcm2835).

* tag 'arm-soc/for-5.12/devicetree-part2' of https://github.com/Broadcom/stblinux:
  Revert "ARM: dts: bcm2711: Add the BSC interrupt controller"

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 11:33:08 +02:00
Marek Vasut
1305a42b10 ARM: dts: stm32: Enable crc1 and cryp1 where applicable on DHSOM
Enable the CRC accelerator on all STM32MP15xx DHSOM based systems
and CRYP accelerator on all STM32MP15x[CF] DHSOM based systems.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-01 11:30:01 +02:00
Marek Vasut
7d96c4a5ec ARM: dts: stm32: Update GPIO line names on PicoITX
Use more specific custom GPIO line names which denote exactly where
the GPIO came from, i.e. the base board. Also, update the new blank
GPIO line names set up by stm32mp15xx-dhcom-som.dtsi back to their
original values.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-01 10:03:55 +02:00
Marek Vasut
1ab841fbab ARM: dts: stm32: Update GPIO line names on DRC02
Use more specific custom GPIO line names which denote exactly where
the GPIO came from, i.e. the base board. Also, update the new blank
GPIO line names set up by stm32mp15xx-dhcom-som.dtsi back to their
original values.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-01 10:03:55 +02:00
Marek Vasut
d73d4e3cab ARM: dts: stm32: Fill GPIO line names on AV96
Fill in the custom GPIO line names used by DH.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-01 10:03:55 +02:00
Marek Vasut
c967b44249 ARM: dts: stm32: Fill GPIO line names on DHCOM SoM
Fill in the custom GPIO line names used by DH on the DHCOM SoM.
The GPIO line names are in accordance to DHCOM Design Guide R04
available at [1], section 3.9 GPIO.

[1] https://wiki.dh-electronics.com/images/5/52/DOC_DHCOM-Design-Guide_R04_2018-06-28.pdf

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-01 10:03:55 +02:00
dillon min
2aaa41eea3 ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6
This patchset has following changes:

- introduce stm32h750.dtsi to support stm32h750 value line
- add pin groups for usart3/uart4/spi1/sdmmc2
- add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile)
- add stm32h750-art-pi.dts to support art-pi board

art-pi board component:
- 8MiB qspi flash
- 16MiB spi flash
- 32MiB sdram
- ap6212 wifi&bt&fm

the detail board information can be found at:
https://art-pi.gitee.io/website/

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-01 09:51:41 +02:00
Alexandre Torgue
978783f90a ARM: dts: stm32: fix i2c node typo in stm32h743
Replace upper case by lower case in i2c nodes name.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-01 09:47:08 +02:00
Alexandre Torgue
4e1593391f ARM: dts: stm32: add new instances for stm32h743 MCU
Some instances are missing in current support of stm32h743 MCU. This commit
adds usart3/uart4 and sdmmc2 support.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-01 09:46:55 +02:00
dillon min
d3f715e63f ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750
This patch is intend to add support stm32h750 value line,
just add stm32h7-pinctrl.dtsi for extending, with following changes:

- rename stm32h743-pinctrl.dtsi to stm32h7-pinctrl.dtsi
- move 'pin-controller' from stm32h7-pinctrl.dtsi to stm32h743.dtsi, to
  fix make dtbs_check warrnings
  arch/arm/boot/dts/stm32h750i-art-pi.dt.yaml: soc: 'i2c@40005C00',
  'i2c@58001C00' do not match any of the regexes:
  '@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$', 'pinctrl-[0-9]+'

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-01 09:33:33 +02:00
Drew Fustini
ee368a10d0 ARM: dts: am335x-boneblack.dts: unique gpio-line-names
Based on linux-gpio discussion [1], it is best practice to make the
gpio-line-names unique. Generic names like "[ethernet]" are replaced
with the name of the unique signal on the AM3358 SoC ball corresponding
to the gpio line. "[NC]" is also renamed to the standard "NC" name to
represent "not connected".

[1] https://lore.kernel.org/linux-gpio/20201216195357.GA2583366@x1/

Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-31 08:54:45 +03:00
Boris Lysov
562f818dea arm: mediatek: dts: activate SMP for mt6589
This simple patch activates SMP for mt6589 by adding the missing
"enable-method" property. After applying this patch kernel log
indicates all cores are brought up:

[    0.070122] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.071652] Setting up static identity map for 0x80100000 - 0x80100054
[    0.072711] rcu: Hierarchical SRCU implementation.
[    0.073853] smp: Bringing up secondary CPUs ...
[    0.133675] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[    0.193675] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002
[    0.253675] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003
[    0.253818] smp: Brought up 1 node, 4 CPUs
[    0.256930] SMP: Total of 4 processors activated (7982.28 BogoMIPS).
[    0.257855] CPU: All CPU(s) started in SVC mode.

Before this change CPU cores 1-3 didn't start and the following lines
were in kernel log:

[    0.070126] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.071640] Setting up static identity map for 0x80100000 - 0x80100054
[    0.072706] rcu: Hierarchical SRCU implementation.
[    0.073850] smp: Bringing up secondary CPUs ...
[    0.076052] smp: Brought up 1 node, 1 CPU
[    0.076678] SMP: Total of 1 processors activated (2000.48 BogoMIPS).
[    0.077603] CPU: All CPU(s) started in SVC mode.

Signed-off-by: Boris Lysov <arzamas-16@mail.ee>
Link: https://lore.kernel.org/r/20210314023735.052d2d35@pc
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-30 12:12:25 +02:00
Linus Walleij
fa99edd84f ARM: dts: ux500: Add Cypress CTTYSP touch to TVK UIB
The TVK1281618 R3 UIB has a Cypress CTTYSP touchscreen.
Add it to the device tree file.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-30 11:34:50 +02:00
Linus Walleij
f9bf6cb246 ARM: dts: ux500: Bump AUX1 voltage
The voltage default on the AB8500 VAUX1 regulator is way
too low and does not correspond to the setting in the
vendor tree. This should be 2.8-3.3 V not 2.5-2.9 V or
things like the HREFP520 touchscreen will not work.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-30 11:34:43 +02:00
Stefan Riedmueller
f57011e72f ARM: dts: imx6: pbab01: Set vmmc supply for both SD interfaces
Setting the vmmc supplies is crucial since otherwise the supplying
regulators get disabled and the SD interfaces are no longer powered
which leads to system failures if the system is booted from that SD
interface.

Fixes: 1e44d3f880 ("ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module")
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-30 16:35:28 +08:00
Stefan Riedmueller
45b78dd39f ARM: dts: imx6: pbab01: Set USB OTG port to peripheral
Due to a hardware bug preventing the correct detection if the ID pin
the USB OTG port cannot be used in otg mode. It can either be set to
host or peripheral. Set it to peripheral so vbus is disabled by default.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-30 16:33:16 +08:00
Stefan Riedmueller
a255af65df ARM: dts: imx6: pfla02: Fix USB vbus enable pinmuxing
The pinmuxing for the enable pin of the usbh1 node is wrong. It needs to
be muxed as GPIO. While at it, move the pinctrl to the vbus regulator
since it is actually the regulator enable pin.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-30 16:29:01 +08:00
Rafał Miłecki
dcb56d61d5 ARM: dts: BCM5301X: Set Linksys EA9500 power LED
Set Linux default trigger to default on, just like it's normally done
for power LEDs.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-29 11:43:45 -07:00
Rafał Miłecki
1d3352aeed ARM: dts: BCM5301X: Fix Linksys EA9500 partitions
Partitions are basically fixed indeed but firmware ones don't have
hardcoded function ("firmware" vs "failsafe"). Actual function depends
on bootloader configuration. Use a proper binding for that.

While at it fix numbers formatting to avoid:
arch/arm/boot/dts/bcm47094-linksys-panamera.dt.yaml: partitions: 'partition@1F00000' does not match any of the regexes: '^partition@[0-9a-f]+$', 'pinctrl-[0-9]+'
        From schema: Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-29 11:41:04 -07:00
Chunfeng Yun
617ab489aa arm: dts: mt2701: harmonize node names and compatibles
This is used to fix dtbs_check warning

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-13-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-29 15:45:34 +02:00
Chunfeng Yun
d0ec64bd67 arm: dts: mt7623: harmonize node names and compatibles
This is used to fix dtbs_check warning

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-12-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-29 15:45:34 +02:00
Chunfeng Yun
28acbc773c arm: dts: mt7629: harmonize node names and compatibles
This is used to fix dtbs_check warning

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-11-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-29 15:45:33 +02:00
Alain Volmat
14c9e23369 ARM: dts: stm32: enable the analog filter for all I2C nodes in stm32mp151
Enable the analog filter for all I2C nodes of the stm32mp151.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-29 11:13:44 +02:00
Alistair Francis
c11d56b376 ARM: imx7d-remarkable2: Initial device tree for reMarkable2
The reMarkable2 (https://remarkable.com) is an e-ink tablet based on
the imx7d SoC.

This commit is based on the DTS provide by reMarkable but ported to the
latest kernel (instead of 4.14). I have removed references to
non-upstream devices and have changed the UART so that the console can
be accessed without having to open up the device via the OTG pogo pins.

Currently the kernel boots, but there is no support for the display.

WiFi is untested (no display or UART RX makes it hard to test), but
should work with the current upstream driver. As it's untested it's not
included in this commit.

Signed-off-by: Alistair Francis <alistair@alistair23.me>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:43:19 +08:00
Timon Baetz
7f4ebf3e4c ARM: dts: exynos: Add front camera support to I9100
Add node for Samsung S5K5BAF CMOS image sensor and enable the associated
MIPI CSI-2 receiver node.

Signed-off-by: Timon Baetz <timon.baetz@protonmail.com>
Link: https://lore.kernel.org/r/20210327200851.777327-1-timon.baetz@protonmail.com
[krzk: put csis_1 node in alphabetical order]
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-03-28 20:10:09 +02:00
Linus Walleij
8e3bcdeec7 ARM: dts: ux500: Clarify UIB version per board
Make it clear which UIB is used with each board in
comments and model text.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-27 00:37:28 +01:00
Linus Walleij
396e4dd89d ARM: dts: ux500: Totally separate TVK R2 and R3
There is no point in sharing any definitions between
the R2 and R3 versions of the TVK1281618 UIB. The
proximity sensor collides with the touchscreen etc,
it is less confusing to get rid of the overarching
TVK1281618 UIB file and just use one for each.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-27 00:36:58 +01:00
Linus Walleij
c9334538bf ARM: dts: ux500: Push TC35893 defines to each UIB
The TC35893 is connected to different GPIOs in different
UIBs so just bite the bullet and push this info down
into respective UIB so we can avoid confusion when
reading the DTS files.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-27 00:36:50 +01:00
Dmitry Osipenko
3a6c267dd7 ARM: tegra: acer-a500: Add atmel,wakeup-method property
Acer A500 uses Atmel Maxtouch 1386 touchscreen controller. This controller
has WAKE line which could be connected to I2C clock lane, dedicated GPIO
or fixed to HIGH level. Controller wakes up from a deep sleep when WAKE
line is asserted low. Acer A500 has WAKE line connected to I2C clock and
Linux device driver doesn't work property without knowing what wakeup
method is used by h/w.

Add atmel,wakeup-method property to the touchscreen node.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
[treding@nvidia.com: use literal to avoid dependency on header file]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-26 14:21:28 +01:00
Linus Walleij
aeceecd40d ARM: dts: ux500: Fix up TVK R3 sensors
The TVK1281618 R3 sensors are different from the R2 board,
some incorrectness is fixed and some new sensors added, we
also rename the nodes appropriately with accelerometer@
etc.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-26 10:45:28 +01:00
Linus Walleij
8d67f4f62c ARM: dts: ux500: Push sensors to TVK R2 board
These sensors are particular to the TVK UIB R2 board and
will conflict with the R3 board, so push them down to
the actual UIB include DTSI.

Rename the nodes appropriately to accelerometer@ etc
in the process.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-26 10:45:21 +01:00
Linus Walleij
b428648f60 ARM: dts: ux500: Move Synaptics to right include
The Synaptics RMI4 touchscreen is a property of the
TVK1281618 R2 UIB, so move it into that file instead
of the main TVK1281618 main include so we can define
another touchscreen for the R3 UIB.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-26 10:45:15 +01:00
Linus Walleij
2c276eaba3 ARM: dts: ux500: Fix touchscreen on TVK R2
The touchscreen is mounted with flipped x/y on the R2
version of TVK1281618. Push this setting to that DTS file
only.

The function nodes were named wrong so the OF properties
didn not "take". Fix the node names from "rmi-fnn" to
"rmi4-nn" so this also work.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-26 10:42:31 +01:00
Linus Walleij
2a5b057032 ARM: dts: ux500: Fix BT+WLAN on Janice
GPIO215 has a rail named WLAN_RST_N but it is actually connected
to the pin WLAN_REG_ON on the BCM4330 chip, so this should be
the WLAN regulator GPIO rather than GPIO222. The misunderstanding
comes from the erroneous naming of the rail on the schematic.

GPIO222 is indeed connected to the rail BT_VREG_EN and the pin
BT_REG_ON, and can be handled by the driver as usual.

This corrects misunderstandings and makes Janice's WLAN and BT
setup look like that of Golden and Skomer.

Add explicit BCM4330 compatible to the WLAN chip.

Cc: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
2021-03-26 10:41:51 +01:00
Rafał Miłecki
a872b8e94b ARM: dts: BCM5301X: Describe NVMEM NVRAM on Linksys & Luxul routers
Provide access to NVRAM which contains device environment variables.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-25 14:19:02 -07:00
Rafał Miłecki
43986f3881 ARM: dts: BCM5301X: fix "reg" formatting in /memory node
This fixes warnings/errors like:
arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml: /: memory@0:reg:0: [0, 134217728, 2281701376, 402653184] is too long
        From schema: /lib/python3.6/site-packages/dtschema/schemas/reg.yaml

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-25 14:19:02 -07:00
Johan Jonker
398a408787 ARM: dts: rockchip: remove clock-names property from watchdog node in rv1108.dtsi
A test with the command below gives this error:

/arch/arm/boot/dts/rv1108-evb.dt.yaml: watchdog@10360000:
clock-names:0: 'tclk' was expected

Comment from the dw_wdt.c file:

Try to request the watchdog dedicated timer clock source. It must
be supplied if asynchronous mode is enabled. Otherwise fallback
to the common timer/bus clocks configuration, in which the very
first found clock supply both timer and APB signals.

Like in the other Rockchip watchdog nodes the property "clock-names"
is not needed, so remove it.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20201218120534.13788-8-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-03-25 01:35:44 +01:00
Johan Jonker
9ceb98f1ed ARM: dts: rockchip: add new watchdog compatible to rk322x.dtsi
The watchdog compatible strings are suppose to be SoC orientated.
In the more recently added Rockchip rk322x.dtsi file only
the fallback string "snps,dw-wdt" is used, so add the new
compatible string:

"rockchip,rk3228-wdt", "snps,dw-wdt"

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20201218120534.13788-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-03-25 01:35:44 +01:00
Johan Jonker
610e4c7215 ARM: dts: rockchip: add new watchdog compatible to rv1108.dtsi
The watchdog compatible strings are suppose to be SoC orientated.
In the more recently added Rockchip rv1108.dtsi file only
the fallback string "snps,dw-wdt" is used, so add the new
compatible string:

"rockchip,rv1108-wdt", "snps,dw-wdt"

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20201218120534.13788-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-03-25 01:35:43 +01:00
Sebastian Reichel
c28c2b851a ARM: dts: motorola-cpcap-mapphone: Prepare for dtbs_check parsing
'<&gpio1 parameters &gpio2 parameters>' and '<&gpio1 parameters>,
<&gpio2 parameters>' result in the same DTB, but second format has
better source code readability. Also 'dtbs_check' currently uses
this format to determine the amount of items specified, so using
this syntax is needed to successfully verify the devicetree source
against a DT schema format.

Cc: linux-omap@vger.kernel.org
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 18:31:09 +02:00
Dario Binacchi
f5a1acab32 ARM: dts: am33xx-l4: fix tscadc@0 node indentation
Fix the broken indentation of tscadc@0 node.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 18:31:09 +02:00
André Hentschel
2082852fd7 ARM: dts: omap3-echo: Add ath6kl node
Add ath6kl node.

Signed-off-by: André Hentschel <nerv@dawncrow.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 18:31:09 +02:00
André Hentschel
9f98835bb0 ARM: dts: omap3-echo: Update LED configuration
Update LED configuration.

Signed-off-by: André Hentschel <nerv@dawncrow.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 18:31:08 +02:00
Drew Fustini
908e654366 ARM: dts: am335x-pocketbeagle: unique gpio-line-names
Based on linux-gpio discussion [1], it is best practice to make the
gpio-line-names unique. Generic names like "[ethernet]" are replaced
with the name of the unique signal on the AM3358 SoC ball corresponding
to the gpio line. "[NC]" is also renamed to the standard "NC" name to
represent "not connected".

[1] https://lore.kernel.org/linux-gpio/20201216195357.GA2583366@x1/

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 18:31:08 +02:00
Dmitry Osipenko
b007744d8f ARM: tegra: Specify tps65911 as wakeup source
Specify TPS65911 as wakeup source on Tegra devices in order to allow
its RTC to wake up system from suspend by default instead of requiring
wakeup to be enabled manually via sysfs.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:09:58 +01:00
Dmitry Osipenko
3b18164c5e ARM: tegra: Specify memory suspend OPP in device-tree
Specify memory suspend OPP in a device-tree, just for consistency.
Now memory will always suspend on the same frequency.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Tested-by: Dmitry Osipenko <digetx@gmail.com> # A500 T20 and Nexus7 T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:09:45 +01:00
Dmitry Osipenko
1f0ca05865 ARM: tegra: Specify CPU suspend OPP in device-tree
Specify CPU suspend OPP in a device-tree, just for consistency. Now CPU
will always suspend on the same frequency.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Tested-by: Dmitry Osipenko <digetx@gmail.com> # A500 T20 and Nexus7 T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:09:32 +01:00
Dmitry Osipenko
f8693f78f4 ARM: tegra: ouya: Specify all CPU cores as cooling devices
If CPU0 is unplugged the cooling device can not rebind to CPU1. And if
CPU0 is plugged in again, the cooling device may fail to initialize.

If the CPUs are mapped with the physical CPU0 to Linux numbering
CPU1, the cooling device mapping will fail.

Hence specify all CPU cores as a cooling devices in the device-tree.

Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:09:17 +01:00
Dmitry Osipenko
e7c54567ca ARM: tegra: nexus7: Specify all CPU cores as cooling devices
If CPU0 is unplugged the cooling device can not rebind to CPU1. And if
CPU0 is plugged in again, the cooling device may fail to initialize.

If the CPUs are mapped with the physical CPU0 to Linux numbering
CPU1, the cooling device mapping will fail.

Hence specify all CPU cores as a cooling devices in the device-tree.

Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:09:02 +01:00
Dmitry Osipenko
b27b9689e1 ARM: tegra: acer-a500: Rename avdd to vdda of touchscreen node
Rename avdd supply to vdda of the touchscreen node. The old supply name
was incorrect.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:08:48 +01:00
Dmitry Osipenko
2a8ec2fcea ARM: tegra: acer-a500: Specify all CPU cores as cooling devices
If CPU0 is unplugged the cooling device can not rebind to CPU1. And if
CPU0 is plugged in again, the cooling device may fail to initialize.

If the CPUs are mapped with the physical CPU0 to Linux numbering
CPU1, the cooling device mapping will fail.

Hence specify all CPU cores as a cooling devices in the device-tree.

Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:08:03 +01:00
Dmitry Osipenko
ecd021396e ARM: tegra: acer-a500: Reduce thermal throttling hysteresis to 0.2C
The 2C hysteresis is a bit too high, although CPU never gets hot on A500.
Nevertheless, let's reduce thermal throttling hysteresis to 0.2C, which is
a much more reasonable value.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:07:50 +01:00
Dmitry Osipenko
30e243fc17 ARM: tegra: acer-a500: Enable core voltage scaling
Allow lower core voltages on Acer A500.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:07:37 +01:00
Dmitry Osipenko
d3cd0c3c49 ARM: tegra: paz00: Enable full voltage scaling ranges for CPU and Core domains
Enable full voltage scaling ranges for CPU and Core power domains.

Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:07:25 +01:00
Dmitry Osipenko
107f2c6995 ARM: tegra: cardhu: Support CPU thermal throttling
Enable CPU thermal throttling on Tegra30 Cardhu board.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:07:11 +01:00
Dmitry Osipenko
ed34855b81 ARM: tegra: cardhu: Support CPU frequency and voltage scaling on all board variants
Enable CPU frequency and voltage scaling on all Tegra30 Cardhu board
variants.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:06:44 +01:00
Dmitry Osipenko
3744c7d88c ARM: tegra: ventana: Support CPU thermal throttling
Enable CPU thermal throttling on Tegra20 Ventana board.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:06:28 +01:00
Dmitry Osipenko
82d3d45995 ARM: tegra: ventana: Support CPU and Core voltage scaling
Support CPU and Core voltage scaling on Tegra20 Ventana board.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:06:06 +01:00
Tony Lindgren
a1ebdb3741 ARM: dts: Fix swapped mmc order for omap3
Also some omap3 devices like n900 seem to have eMMC and micro-sd swapped
around with commit 21b2cec61c ("mmc: Set PROBE_PREFER_ASYNCHRONOUS for
drivers that existed in v4.4").

Let's fix the issue with aliases as discussed on the mailing lists. While
the mmc aliases should be board specific, let's first fix the issue with
minimal changes.

Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 15:10:32 +02:00
Geert Uytterhoeven
3287a7a8fe ARM: dts: koelsch: Configure pull-up for SOFT_SW GPIO keys
The GPIO pins connected to the 4 Software Switches ("SOFT_SW", SW2) do
not have external pull-up resistors, but rely on internal pull-ups being
enabled.  Fortunately this is satisfied by the initial state of these
pins.

Make this explicit by enabling bias-pull-up, to remove the dependency on
initial state and/or boot loader configuration.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210303132941.3938516-1-geert+renesas@glider.be
2021-03-24 10:33:21 +01:00
Jernej Skrabec
d580e6f0ec
ARM: dts: sun8i: h3: beelink-x2: Add power button
Beelink X2 has power button. Add node for it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210323204341.28825-1-jernej.skrabec@siol.net
2021-03-24 10:25:37 +01:00
Krzysztof Kozlowski
910499e133 ARM: socfpga: introduce common ARCH_INTEL_SOCFPGA
Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only
one for both of them.  This the common practice for other platforms.
Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come
from multiple vendors.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-03-23 11:03:35 -05:00
Erwan Le Ray
1657ca6e28 ARM: dts: stm32: Add wakeup management on stm32mp15x UART nodes
Add EXTI lines to the following UART nodes which are used for
wakeup from CStop.
- EXTI line 26 to USART1
- EXTI line 27 to USART2
- EXTI line 28 to USART3
- EXTI line 29 to USART6
- EXTI line 30 to UART4
- EXTI line 31 to UART5
- EXTI line 32 to UART7
- EXTI line 33 to UART8

Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Link: https://lore.kernel.org/r/20210319184253.5841-6-erwan.leray@foss.st.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-03-23 10:28:18 +01:00
Krzysztof Kozlowski
4a4f3a07a5 ARM: dts: exynos: white-space cleanups
Fixups some white-space issues.  Checkpatch reported:

  WARNING: Block comments should align the * on each line
  WARNING: please, no spaces at the start of a line
  ERROR: code indent should use tabs where possible

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210315124313.114842-2-krzysztof.kozlowski@canonical.com
2021-03-19 11:34:46 +01:00
Krzysztof Kozlowski
61342bc64d ARM: dts: exynos: replace deprecated NTC/Murata compatibles
The compatibles with "ntc" vendor prefix become deprecated and "murata"
should be used.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210315124313.114842-1-krzysztof.kozlowski@canonical.com
2021-03-19 11:34:45 +01:00
Arnd Bergmann
67335b8d28 i.MX fixes for 5.12:
- Fix an Ethernet issue on imx6ul-14x14-evk board that is caused by
   independent PHY reset.
 - Add missing `dma-coherent` property for LayerScape device trees to fix a
   kernel BUG report.
 - Use IRQCHIP_DECLARE for AVIC driver to fix a boot issue on i.MX25 with
   fw_devlink=on.
 - Add missing I2C pinctrl entry for imx8mp-phyboard-pollux-rdk board to
   fix the broken I2C GPIO recovery support.
 - Add `fsl,use-minimum-ecc` property for imx6ull-myir-mys-6ulx-eval
   device tree to fix UBI filesystem mount failure.
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Merge tag 'imx-fixes-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.12:

- Fix an Ethernet issue on imx6ul-14x14-evk board that is caused by
  independent PHY reset.
- Add missing `dma-coherent` property for LayerScape device trees to fix a
  kernel BUG report.
- Use IRQCHIP_DECLARE for AVIC driver to fix a boot issue on i.MX25 with
  fw_devlink=on.
- Add missing I2C pinctrl entry for imx8mp-phyboard-pollux-rdk board to
  fix the broken I2C GPIO recovery support.
- Add `fsl,use-minimum-ecc` property for imx6ull-myir-mys-6ulx-eval
  device tree to fix UBI filesystem mount failure.

* tag 'imx-fixes-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx6ull: fix ubi filesystem mount failed
  ARM: imx6ul-14x14-evk: Do not reset the Ethernet PHYs independently
  arm64: dts: imx8mp-phyboard-pollux-rdk: Add missing pinctrl entry
  arm64: dts: ls1012a: mark crypto engine dma coherent
  arm64: dts: ls1043a: mark crypto engine dma coherent
  arm64: dts: ls1046a: mark crypto engine dma coherent
  ARM: imx: avic: Convert to using IRQCHIP_DECLARE

Link: https://lore.kernel.org/r/20210318090145.GA22955@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-03-18 23:53:47 +01:00
Arnd Bergmann
3848421f9d AT91 fixes for 5.12:
- only DT changes
 -- wrong phy address that blocks Ethernet use on boards with sama5d27 SoM1
 -- restrictive PIN possibilities for sam9x60
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Merge tag 'at91-fixes-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes

AT91 fixes for 5.12:

- only DT changes
-- wrong phy address that blocks Ethernet use on boards with sama5d27 SoM1
-- restrictive PIN possibilities for sam9x60

* tag 'at91-fixes-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sam9x60: fix mux-mask to match product's datasheet
  ARM: dts: at91: sam9x60: fix mux-mask for PA7 so it can be set to A, B and C
  ARM: dts: at91-sama5d27_som1: fix phy address to 7

Link: https://lore.kernel.org/r/20210310160547.55382-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-03-18 23:53:25 +01:00
Arnd Bergmann
ebccfa8a74 Fixes for omaps for v5.12-rc cycle
Regression fixes for multiple issues found mostly caused by recent changes
 to drop legacy platform data and and starting to use the new prm driver
 reset controller:
 
 - Fix ocp interconnect bus access error reporting for omap_l3_noc by
   setting IRQF_NO_THREAD
 
 - Fix changed mmc slot order regression by adding mmc aliases for am335x
 
 - Fix dra7 reboot regression caused by invalid pcie reset map
 
 - Fix smartreflex init regression caused by dropped legacy data
 
 - Fix ti-sysc driver warning on unbind if reset is not deasserted
 
 - Fix flakey reset deassert for dra7 iva
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Merge tag 'omap-for-v5.12/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps for v5.12-rc cycle

Regression fixes for multiple issues found mostly caused by recent changes
to drop legacy platform data and and starting to use the new prm driver
reset controller:

- Fix ocp interconnect bus access error reporting for omap_l3_noc by
  setting IRQF_NO_THREAD

- Fix changed mmc slot order regression by adding mmc aliases for am335x

- Fix dra7 reboot regression caused by invalid pcie reset map

- Fix smartreflex init regression caused by dropped legacy data

- Fix ti-sysc driver warning on unbind if reset is not deasserted

- Fix flakey reset deassert for dra7 iva

* tag 'omap-for-v5.12/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva
  bus: ti-sysc: Fix warning on unbind if reset is not deasserted
  ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data
  soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7
  ARM: dts: am33xx: add aliases for mmc interfaces
  bus: omap_l3_noc: mark l3 irqs as IRQF_NO_THREAD

Link: https://lore.kernel.org/r/pull-1614868603-800959@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-03-18 23:52:27 +01:00
dillon min
e4817a1b6b ARM: dts: imx6ull: fix ubi filesystem mount failed
For NAND Ecc layout, there is a dependency from old kernel's nand driver
setting and current. if old kernel use 4 bit ecc , we should use 4 bit
in new kernel either. else will run into following error at filesystem
mounting.

So, enable fsl,use-minimum-ecc from device tree, to fix this mismatch

[    9.449265] ubi0: scanning is finished
[    9.463968] ubi0 warning: ubi_io_read: error -74 (ECC error) while reading
22528 bytes from PEB 513:4096, read only 22528 bytes, retry
[    9.486940] ubi0 warning: ubi_io_read: error -74 (ECC error) while reading
22528 bytes from PEB 513:4096, read only 22528 bytes, retry
[    9.509906] ubi0 warning: ubi_io_read: error -74 (ECC error) while reading
22528 bytes from PEB 513:4096, read only 22528 bytes, retry
[    9.532845] ubi0 error: ubi_io_read: error -74 (ECC error) while reading
22528 bytes from PEB 513:4096, read 22528 bytes

Fixes: f9ecf10cb8 ("ARM: dts: imx6ull: add MYiR MYS-6ULX SBC")
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-18 12:06:28 +08:00
Fabio Estevam
69cbbf6be5 ARM: imx6ul-14x14-evk: Do not reset the Ethernet PHYs independently
The imx6ul-evk board designer took the bad decision to tie the
two Ethernet PHY reset lines together. This prevents one Ethernet
interface to work while the other one is brought down. For example:

 # ifconfig eth0 down
 # [  279.386551] fec 2188000.ethernet eth1: Link is Down

Bringing eth0 interface down also causes eth1 to be down.

The Ethernet reset lines comes from the IO expander and both come in
logic level 0 by default.

To fix this issue, remove the Ethernet PHY reset descriptions from
its respective PHY nodes and force both Ethernet PHY lines to be at
logic level 1 via gpio-hog.

Fixes: 2db7e78bf0 ("ARM: dts: imx6ul-14x14-evk: Describe the KSZ8081 reset")
Reported-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 15:28:32 +08:00
Fabio Estevam
610a5e2883 ARM: dts: imx7d-mba7: Remove unsupported PCI properties
disable-gpio' and 'power-on-gpio' are not valid properties
according to Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt.

Remove the unsupported properties.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Reviewed-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:35:39 +08:00
Tim Harvey
bbc4c8a531 ARM: dts: imx6qdl-gw*: Remove unnecessary #address-cells/#size-cells
Remove the unnecessary #address-cells/#size-cells to avoid warnings
from W=1 build like this:

arch/arm/boot/dts/imx6qdl-gw52xx.dtsi:33.12-78.4: Warning (avoid_unnecessary_addr_size): /gpio-keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
[fabio: Make the warning messages more succint]
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:17:35 +08:00
Fabio Estevam
2343e697fa ARM: dts: imx6dl-plybas: Fix gpio-keys W=1 warnings
Remove the unnecessary #address-cells/#size-cells and rename the node
names to fix the following W=1 dtc warnings:

arch/arm/boot/dts/imx6dl-plybas.dts:26.13-30.5: Warning (unit_address_vs_reg): /gpio_keys/button@20: node has a unit name, but no reg or ranges property
arch/arm/boot/dts/imx6dl-plybas.dts:32.13-36.5: Warning (unit_address_vs_reg): /gpio_keys/button@21: node has a unit name, but no reg or ranges property
arch/arm/boot/dts/imx6dl-plybas.dts:20.12-37.4: Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:17:22 +08:00
Ian Ray
e0ece1860d ARM: dts: imx: bx50v3: Define GPIO line names
Define GPIO line names for b450v3, b650v3, and b850v3.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Sebastian Reichel
4ec79ac7fa ARM: dts: imx: bx50v3: i2c GPIOs are open drain
Explicitly mark I2C GPIOs as open drain to fix the following
kernel message being printed:

enforced open drain please flag it properly in DT/ACPI DSDT/board file

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Sebastian Reichel
b0884cf28f ARM: dts: imx6q-ba16: improve PHY information
Add PHY voltage supply information fixing the following kernel message:

2188000.ethernet supply phy not found, using dummy regulator

Also add PHY clock information to avoid depending on the bootloader
programming correct values.

The bootloader also sets some reserved registers in the PHY as
advised by Qualcomm, which is not supported by the bindings/kernel
driver, so the reset GPIO has not been added intentionally.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Sebastian Reichel
f285369a28 ARM: dts: imx6q-ba16: add USB OTG VBUS enable GPIO
Add VBUS regulator GPIO information, so that USB OTG port can
also be used in host mode.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Horia Geantă
0f22183206 ARM: dts: ls1021a: mark crypto engine dma coherent
Crypto engine (CAAM) on LS1021A platform is configured HW-coherent,
mark accordingly the DT node.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Philippe Schenker
ce8da61493 ARM: dts: colibri-imx6ull: Change drive strength for usdhc2
The current setting reflects about 86 Ohms of source-impedance
on the SDIO signals where the WiFi board is hooked up. PCB traces are
routed with 50 Ohms impedance and there are no serial resistors on
those traces.

This commit changes the source-impedance to 52 Ohms to better match our
hardware design.

The impedances given in this commit message refer to 3.3V operation.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Alexander Shiyan
952d23b053 ARM: dts: imx6ql-pfla02: Move "hog" pins into corresponded pin groups
Move the "hog" pins to the corresponding pin groups for SPI, ENET, PMIC,
LEDs, so that these pins can be used for different purposes when the
respective drivers are disabled.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Alexander Shiyan
51c045ec31 ARM: dts: imx6qdl-phytec-pbab01: Select synchronous mode for AUDMUX
Board uses 4-wire synchronous mode for audio,
so add SYN bit for PTCR AUDMUX registers.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Alexander Shiyan
5e27eeec3b ARM: dts: imx6qdl-ts7970: Drop redundant "fsl,mode" option
The operating mode is used for the AC97 interface only,
so lets drop the excess fsl,mode item from SSI node.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Fabio Estevam
a10419db66 ARM: dts: imx53-qsb: Describe the esdhc1 card detect pin
The micro SD card slot uses GPIO3_13 as card detect pin, so describe
it in the devicetree.

This was noticed when converting imx53-qsb board to driver model
in U-Boot as the micro SD card was not getting detected.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Serge Semin
c2b652e381 ARM: dts: ls1021a: Harmonize DWC USB3 DT nodes name
In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:17 +08:00
Dima Azarkin
efd9d2419c ARM: dts: imx6qdl-wandboard: add scl/sda gpios definitions for i2c bus recovery
The i2c bus on imx6qdl-wandboard has intermittent issues where SDA can freeze
on low level at the end of transaction so the bus can no longer work. This
impacts reading of EDID data leading to incorrect TV resolution and no audio.

This scenario is improved by adding scl/sda gpios definitions to implement the
i2c bus recovery mechanism.

Signed-off-by: Dima Azarkin <azdmg@outlook.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:16 +08:00
Sebastian Reichel
36034ae5bb ARM: dts: imx: Mark IIM as syscon on i.MX51/i.MX53
IIM contains system fuses with information like SoC unique ID
(serial) on i.MX51 and i.MX53. Add "syscon" compatible allowing
simple access.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:16 +08:00
Andreas Kemnade
7c040ba9e7 ARM: dts: imx6sl-tolino-shine2hd: Add Netronix embedded controller
For now, the driver detects an incompatible version, but since
that can be handled by auto-detection, add the controller to the
devicetree now. Only PWM seems to be available, there is no RTC
in that controller.

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:16 +08:00
Jonathan Neuschäfer
ad28c3bd7e ARM: dts: imx50-kobo-aura: Add Netronix embedded controller
Enable the Netronix EC on the Kobo Aura ebook reader.

Several features are still missing:
 - Frontlight/backlight. The vendor kernel drives the frontlight LED
   using the PWM output of the EC and an additional boost pin that
   increases the brightness.
 - Battery monitoring
 - Interrupts for RTC alarm and low-battery events

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:16 +08:00
Jagan Teki
adc0496104 ARM: dts: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.

Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out

i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.

i.Core STM32MP1 needs to mount on top of this Evaluation board for
creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11 12:06:23 +01:00
Jagan Teki
6ca2898df5 ARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.

Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector

i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.

i.Core STM32MP1 needs to mount on top of this Carrier board for
creating complete i.Core STM32MP1 C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11 12:06:23 +01:00
Jagan Teki
30f9a9da4e ARM: dts: stm32: Add Engicam i.Core STM32MP1 SoM
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.

General features:
- STM32MP157A
- Up to 1GB DDR3L
- 4GB eMMC
- 10/100 Ethernet
- USB 2.0 Host/OTG
- I2S
- MIPI DSI to LVDS
- rest of STM32MP157A features

i.Core STM32MP1 needs to mount on top of Engicam baseboards
for creating complete platform solutions.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11 12:06:23 +01:00
Jagan Teki
1d278204cb ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 7" OF
7" OF is a capacitive touch 7" Open Frame panel solutions with
- 7" AUO B101AW03 LVDS panel
- EDT, FT5526 Touch

MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.

MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.

MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0
7" Open Frame Solution board.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Francesco Utel <francesco.utel@engicam.com>
Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11 12:06:23 +01:00
Jagan Teki
f838dae7af ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 board
MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.

Genaral features:
- Ethernet 10/100
- USB Type A
- Audio Out
- microSD
- LVDS panel connector
- Wifi/BT (option)
- UMTS LTE with sim connector (option)

MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.

MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Francesco Utel <francesco.utel@engicam.com>
Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11 12:06:23 +01:00
Jagan Teki
0be81dfaea ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 SoM
MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.

General features:
- STM32MP157AAC
- Up to 1GB DDR3L-800
- 512MB Nand flash
- I2S

MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier
boards for creating complete platform solutions.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Francesco Utel <francesco.utel@engicam.com>
Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11 12:06:22 +01:00
Valentin CARON - foss
a1429f3d30 ARM: dts: stm32: fix usart 2 & 3 pinconf to wake up with flow control
Modify usart 2 & 3 pins to allow wake up from low power mode while the
hardware flow control is activated. UART RTS pin need to stay configure
in idle mode to receive characters in order to wake up.

Fixes: 842ed898a7 ("ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl")

Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11 12:05:11 +01:00
Nicolas Ferre
2c69c8a173 ARM: dts: at91: sam9x60: fix mux-mask to match product's datasheet
Fix the whole mux-mask table according to datasheet for the sam9x60
product.  Too much functions for pins were disabled leading to
misunderstandings when enabling more peripherals or taking this table
as an example for another board.
Take advantage of this fix to move the mux-mask in the SoC file where it
belongs and use lower case letters for hex numbers like everywhere in
the file.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Fixes: 1e5f532c27 ("ARM: dts: at91: sam9x60: add device tree for soc and board")
Cc: <stable@vger.kernel.org> # 5.6+
Cc: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20210310152006.15018-1-nicolas.ferre@microchip.com
2021-03-10 16:38:15 +01:00
Federico Pellegrin
664979bba8 ARM: dts: at91: sam9x60: fix mux-mask for PA7 so it can be set to A, B and C
According to the datasheet PA7 can be set to either function A, B or
C (see table 6-2 of DS60001579D). The previous value would permit just
configuring with function C.

Signed-off-by: Federico Pellegrin <fede@evolware.org>
Fixes: 1e5f532c27 ("ARM: dts: at91: sam9x60: add device tree for soc and board")
Cc: <stable@vger.kernel.org> # 5.6+
Cc: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-03-10 16:38:15 +01:00
Claudiu Beznea
221c3a09dd ARM: dts: at91-sama5d27_som1: fix phy address to 7
Fix the phy address to 7 for Ethernet PHY on SAMA5D27 SOM1. No
connection established if phy address 0 is used.

The board uses the 24 pins version of the KSZ8081RNA part, KSZ8081RNA
pin 16 REFCLK as PHYAD bit [2] has weak internal pull-down.  But at
reset, connected to PD09 of the MPU it's connected with an internal
pull-up forming PHYAD[2:0] = 7.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Fixes: 2f61929eb1 ("ARM: dts: at91: at91-sama5d27_som1: fix PHY ID")
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: <stable@vger.kernel.org> # 4.14+
2021-03-10 16:38:15 +01:00
Tony Lindgren
569519de00 Merge branches 'omap-for-v5.13/genpd-dra7', 'omap-for-v5.13/genpd-omap4' and 'omap-for-v5.13/genpd-omap5' into omap-for-v5.13/genpd-drop-legacy
Merge together branches dropping legacy data to avoid a minor merge conflict.
2021-03-10 14:19:20 +02:00
Tony Lindgren
083516ad54 Merge tags 'genpd-dts-dra7', 'genpd-dts-omap4' and 'genpd-dts-omap5' into omap-for-v5.13/dts-genpd
Merge together genpd related dts changes to provide base for dropping the
legacy data to prevent merge conflicts and to send dts changes separately.
2021-03-10 14:16:34 +02:00
Tony Lindgren
e98cf7e694 ARM: OMAP2+: Drop legacy platform data for omap5 l3
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:05:02 +02:00
Tony Lindgren
aa820b664f ARM: OMAP2+: Drop legacy platform data for omap5 emif
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:59 +02:00
Tony Lindgren
1006777ef4 ARM: OMAP2+: Drop legacy platform data for omap5 dmm
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:59 +02:00
Tony Lindgren
e180887946 ARM: dts: Configure simple-pm-bus for omap5 l3
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:58 +02:00
Tony Lindgren
abd1d31d82 ARM: dts: Configure simple-pm-bus for omap5 l4_cfg
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:58 +02:00
Tony Lindgren
6fe4ff9016 ARM: dts: Configure simple-pm-bus for omap5 l4_per
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:58 +02:00
Tony Lindgren
689919e6e2 ARM: dts: Configure simple-pm-bus for omap5 l4_wkup
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:57 +02:00
Tony Lindgren
d1d16959fe ARM: dts: Move omap5 l3-noc to a separate node
In preparation for probing l3 with simple-pm-bus and genpd, we must move
l3 noc to a separate node. This is to prevent omap_l3_noc.c driver from
claiming the whole l3 instance before simple-pm-bus has a chance to probe.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:57 +02:00
Tony Lindgren
a571cc3941 ARM: dts: Move omap5 mmio-sram out of l3 interconnect
We need mmio-sram early for omap4_sram_init() for IO barrier init, and
will be moving l3 interconnect to probe with simple-pm-bus that probes
at module_init() time. So let's move mmio-sram out of l3 to prepare for
that.

Otherwise we will get the following after probing the interconnects with
simple-pm-bus:

omap4_sram_init:Unable to get sram pool needed to handle errata I688

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:57 +02:00
Tony Lindgren
41ccb66237 ARM: dts: Configure interconnect target module for omap5 sata
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Note that the old sysc register offset is wrong, the real offset is at
0x1100 as listed in TRM for SATA_SYSCONFIG register. Looks like we've been
happily using sata on the bootloader configured sysconfig register and
nobody noticed. Also the old register range for SATAMAC_wrapper registers
is wrong at 7 while it should be 8. But that too seems harmless.

There is also an L3 parent interconnect range that we don't seem to be
using. That can be added as needed later on.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:56 +02:00
Tony Lindgren
5f89cdc103 ARM: dts: Configure interconnect target module for omap5 gpmc
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:56 +02:00
Tony Lindgren
0e666eb531 ARM: dts: Configure interconnect target module for omap5 mpu
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:55 +02:00
Tony Lindgren
9921f0b9d0 ARM: dts: Configure interconnect target module for omap5 emif
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:55 +02:00
Tony Lindgren
84864f8d2c ARM: dts: Configure interconnect target module for omap5 dmm
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:54 +02:00
Tony Lindgren
3e1ea524d6 ARM: OMAP2+: Drop legacy platform data for omap4 l3
We can now probe interconnects with simple-pm-bus and genpd.

Let's drop the legacy data along with the ti,hwmods property and flip
over to using simple-pm-bus instead of simple-bus.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:37 +02:00
Tony Lindgren
88b1879168 ARM: OMAP2+: Drop legacy platform data for omap4 debugss
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:35 +02:00
Tony Lindgren
a8876b4a3d ARM: OMAP2+: Drop legacy platform data for omap4 emif
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:34 +02:00
Tony Lindgren
35c34fbcbf ARM: OMAP2+: Drop legacy platform data for omap4 dmm
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:34 +02:00
Tony Lindgren
e1d4a11d68 ARM: dts: Prepare for simple-pm-bus for omap4 l3
Let's configure omap4 l3 for power-domain and clocks in preparation for
starting to use simple-pm-bus. We will flip over to using simple-pm-bus
later on after dropping the legacy data for all the devices on l3
interconnect.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:33 +02:00
Tony Lindgren
40dbf5b13f ARM: OMAP2+: Drop legacy platform data for omap4 control modules
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:33 +02:00
Tony Lindgren
eb586ea39f ARM: OMAP2+: Drop legacy platform data for omap4 iss
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:33 +02:00
Tony Lindgren
9a1d0c2837 ARM: dts: Configure simple-pm-bus for omap4 l4_cfg
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:32 +02:00
Tony Lindgren
67dcfdc4a6 ARM: dts: Configure simple-pm-bus for omap4 l4_per
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:32 +02:00
Tony Lindgren
d978b69fa7 ARM: dts: Configure simple-pm-bus for omap4 l4_wkup
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:31 +02:00
Tony Lindgren
bacc83e5ee ARM: dts: Move omap4 l3-noc to a separate node
In preparation for probing l3 with simple-pm-bus and genpd, we must move
l3 noc to a separate node. This is to prevent omap_l3_noc.c driver from
claiming the whole l3 instance before simple-pm-bus has a chance to probe.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:31 +02:00
Tony Lindgren
fbe8285d65 ARM: dts: Move omap4 mmio-sram out of l3 interconnect
We need mmio-sram early for omap4_sram_init() for IO barrier init, and
will be moving l3 interconnect to probe with simple-pm-bus that probes
at module_init() time. So let's move mmio-sram out of l3 to prepare for
that.

Otherwise we will get the following after probing the interconnects with
simple-pm-bus:

omap4_sram_init:Unable to get sram pool needed to handle errata I688

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:31 +02:00
Tony Lindgren
e55cc3f040 ARM: dts: Configure interconnect target module for omap4 mpu
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:30 +02:00
Tony Lindgren
932ddde183 ARM: dts: Configure interconnect target module for omap4 debugss
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:30 +02:00
Tony Lindgren
0600dabe34 ARM: dts: Configure interconnect target module for omap4 emif
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:29 +02:00
Tony Lindgren
fe85baacd7 ARM: dts: Configure interconnect target module for omap4 dmm
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also use GIC_SPI and IRQ_TYPE_LEVEL_HIGH defines while at it.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:29 +02:00
Tony Lindgren
398c66ed22 ARM: dts: Configure power-domain for omap4 dts iss
Configure power-domain for omap4 dts iss in preparation to
probing devices with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:29 +02:00
Tony Lindgren
345ac6b17b ARM: dts: Configure power-domain for omap4 gfx
Configure power-domain for omap4 dts gfx in preparation to
probing devices with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:28 +02:00
Tony Lindgren
ecb4c5c096 ARM: dts: Configure simple-pm-bus for dra7 l3
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
e93e4104a2 ARM: dts: Configure simple-pm-bus for dra7 l4_cfg
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
bdfafc8e2b ARM: dts: Configure simple-pm-bus for dra7 l4_per3
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
26c36e16d4 ARM: dts: Configure simple-pm-bus for dra7 l4_per2
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
f483a3e123 ARM: dts: Configure simple-pm-bus for dra7 l4_per1
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
9a75368b64 ARM: dts: Configure simple-pm-bus for dra7 l4_wkup
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
27559a8bd4 ARM: dts: Configure interconnect target module for dra7 dmm
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
860e246443 ARM: OMAP2+: Drop legacy platform data for dra7 dmm
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
f5d0aba7c1 ARM: dts: Configure interconnect target module for dra7 mpu
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
8af15365a3 ARM: dts: Configure interconnect target module for dra7 sata
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Note that the old sysc register offset is wrong, the real offset is at
0x1100 as listed in TRM for SATA_SYSCONFIG register. Looks like we've been
happily using sata on the bootloader configured sysconfig register and
nobody noticed. Also the old register range for SATAMAC_wrapper registers
is wrong at 7 while it should be 8. But that too seems harmless.

There is also an L3 parent interconnect range that we don't seem to be
using. That can be added as needed later on.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
98feab31ac ARM: OMAP2+: Drop legacy platform data for dra7 sata
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
e2d637b069 ARM: dts: Configure interconnect target module for dra7 qspi
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Cc: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00