2
0
mirror of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2025-09-04 20:19:47 +08:00
Commit Graph

12981 Commits

Author SHA1 Message Date
Hamza Mahfooz
1c6b6bd078 drm/amdgpu: register a dirty framebuffer callback for fbcon
fbcon requires that we implement &drm_framebuffer_funcs.dirty.
Otherwise, the framebuffer might take a while to flush (which would
manifest as noticeable lag). However, we can't enable this callback for
non-fbcon cases since it may cause too many atomic commits to be made at
once. So, implement amdgpu_dirtyfb() and only enable it for fbcon
framebuffers (we can use the "struct drm_file file" parameter in the
callback to check for this since it is only NULL when called by fbcon,
at least in the mainline kernel) on devices that support atomic KMS.

Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: stable@vger.kernel.org # 6.1+
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2519
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:25:34 -04:00
Mangesh Gadre
7caebc8f99 drm/amdgpu: Updated TCP/UTCL1 programming
Update TCP/UTCL1 thrashing control settings

v2: updated rev_id check

Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:20:14 -04:00
Srinivasan Shanmugam
f54e1d47e0 drm/amdgpu: Fix kcalloc over kzalloc in 'gmc_v9_0_init_mem_ranges'
Replace kzalloc(n * sizeof(...), ...) with kcalloc(n, sizeof(...), ...)
since kcalloc is the preferred API in case of allocating with multiply.

Fixes the below:

WARNING: Prefer kcalloc over kzalloc with multiply

Cc: Guchun Chen <guchun.chen@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:20:02 -04:00
Philip Yang
5d44a766f7 drm/amdkfd: Share the original BO for GTT mapping
If mGPUs is on same IOMMU group, or is ram direct mapped, then mGPUs
can share the original BO for GTT mapping dma address, without creating
new BO from export/import dmabuf.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:19:07 -04:00
Hawking Zhang
2c0f880abc drm/amdgpu: Fix the return for gpu mode1_reset
amdgpu_device_mode1_reset will return gpu mode1_reset
succeed (ret = 0) as long as wait_for_bootloader call
succeed, regardless of the status reported by smu or
psp firmware. This results to driver continue executing
recovery even smu or psp fail to perform mode1 reset.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:44 -04:00
benl
96271dd4d5 drm/amdgpu: add gfxhub 11.5.0 support
Add initial gfxhub 11.5 support.

Signed-off-by: benl <ben.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:15 -04:00
Prike Liang
b90975fa5b drm/amdgpu: enable gmc11 for GC 11.5.0
Add to IP discovery table.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:13 -04:00
Lang Yu
aba2be4147 drm/amdgpu: add mmhub 3.3.0 support
Add initial implementation for mmhub 3.3.0.

v2: squash in client id fix (Alex)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:09 -04:00
Prike Liang
b5549a2df0 drm/amdgpu/discovery: enable gfx11 for GC 11.5.0
Add to IP discovery table.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:03 -04:00
Lang Yu
d3ff0189c1 drm/amdgpu/discovery: enable mes block for gc 11.5.0
Add to IP discovery table.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:59 -04:00
Aaron Liu
10c9d86918 drm/amdgpu: add mes firmware support for gc_11_5_0
Add scheduler and kiq firmware support for gc_11_5_0.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:57 -04:00
Aaron Liu
d717da1775 drm/amdgpu: add imu firmware support for gc_11_5_0
Add imu firmware support for gc_11_5_0.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:54 -04:00
Aaron Liu
8e42b463df drm/amdgpu: add golden setting for gc_11_5_0
Initialize golden setting for gc_11_5_0.

v2: squash in latest golden updates (Alex)
v3: squash in checkpatch fix (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:47 -04:00
Prike Liang
15e7cbd91d drm/amdgpu/gfx11: initialize gfx11.5.0
Initalize gfx 11.5.0 and set gfx hw configuration.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:44 -04:00
Prike Liang
dd5a326155 drm/amdgpu/gmc11: initialize GMC for GC 11.5.0 memory support
Initialize vram attribute and VMHUB for GC 11.5.0.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:39 -04:00
Prike Liang
d9d6833442 drm/amdgpu/discovery: add nbio 7.11.0 support
Add to IP discovery table.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:30 -04:00
benl
e44d856eaa drm/amdgpu: add nbio 7.11 support
Add initial nbio 7.11 implementation.

Signed-off-by: benl <ben.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:27 -04:00
Prike Liang
bb7249ee45 drm/amdgpu/discovery: enable soc21 support
Add 11.5.0 to IP discovery table.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:22 -04:00
Prike Liang
0d1db799e7 drm/amdgpu/soc21: add initial GC 11.5.0 soc21 support
Disable clock gating and power gating on the early bring up phase.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:18 -04:00
Prike Liang
2c8a7ca164 drm/amdgpu: add new AMDGPU_FAMILY definition
add GC 11.5.0 family

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:15 -04:00
Lang Yu
f56c1941eb drm/amdgpu: use 6.1.0 register offset for HDP CLK_CNTL
Use 6.1.0 register offset and remove unused variable.

v2: clean up logic (Alex)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:12 -04:00
Mangesh Gadre
559259362e drm/amdgpu: Remove SRAM clock gater override by driver
rlc firmware does required setting, driver need not do it.

Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 14:59:30 -04:00
Lijo Lazar
15c5c5f575 drm/amdgpu: Add bootloader status check
Add a function to wait till bootloader has reached steady state.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Tested-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 14:59:24 -04:00
Horace Chen
0bc119fa2e drm/amdkfd: use correct method to get clock under SRIOV
[What]
Current SRIOV still using adev->clock.default_XX which gets from
atomfirmware. But these fields are abandoned in atomfirmware long ago.
Which may cause function to return a 0 value.

[How]
We don't need to check whether SR-IOV. For SR-IOV one-vf-mode,
pm is enabled and VF is able to read dpm clock
from pmfw, so we can use dpm clock interface directly. For
multi-VF mode, VF pm is disabled, so driver can just react as pm
disabled. One-vf-mode is introduced from GFX9 so it shall not have
any backward compatibility issue.

Signed-off-by: Horace Chen <horace.chen@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 14:59:21 -04:00
Lijo Lazar
36b0f88988 drm/amdgpu: Unset baco dummy mode on nbio v7.9
BACO dummy mode could be set under reset conditions and that affects
framebuffer access. Check If baco dummy mode is set, unset it if so.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Tested-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 14:59:16 -04:00
YiPeng Chai
80578f1641 drm/amdgpu: Enable ras for mp0 v13_0_6 sriov
Enable ras for mp0 v13_0_6 sriov

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Stanley.Yang <Stanley.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 14:58:16 -04:00
Samir Dhume
00481158ca drm/amdgpu/jpeg - skip change of power-gating state for sriov
Powergating is handled in the host driver.

Reviewed-by: Zhigang Luo <zhigang.luo@amd.com>
Signed-off-by: Samir Dhume <samir.dhume@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 14:57:59 -04:00
Lijo Lazar
f8a499aed2 drm/amdgpu: Keep reset handlers shared
Instead of maintaining a list per device, keep the reset handlers common
per ASIC family. A pointer to the list of handlers is maintained in
reset control.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Tested-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 14:57:54 -04:00
Le Ma
e240020ad1 drm/amdgpu: update gc_info v2_1 from discovery
Several new fields are exposed in gc_info v2_1

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Shiwu Zhang <shiwu.zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 14:57:32 -04:00
Le Ma
f489a41998 drm/amdgpu: update mall info v2 from discovery
Mall info v2 is introduced in ip discovery

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Shiwu Zhang <shiwu.zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 14:57:29 -04:00
Candice Li
46963ed585 drm/amdgpu: Only support RAS EEPROM on dGPU platform
RAS EEPROM device is only supported on dGPU platform for smu v13_0_6.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 14:57:26 -04:00
Chen Jiahao
d903af1a91 drm/amd/amdgpu: Use kmemdup to simplify kmalloc and memcpy logic
Using kmemdup() helper function rather than implementing it again
with kmalloc() + memcpy(), which improves the code readability.

Signed-off-by: Chen Jiahao <chenjiahao16@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 14:56:47 -04:00
Lijo Lazar
e20ff05170 drm/amdgpu: Add memory vendor information
For ASICs with GC v9.4.3, determine the vendor information from scratch
register.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-16 11:38:11 -04:00
Mario Limonciello
0dee726395 drm/amd: flush any delayed gfxoff on suspend entry
DCN 3.1.4 is reported to hang on s2idle entry if graphics activity
is happening during entry.  This is because GFXOFF was scheduled as
delayed but RLC gets disabled in s2idle entry sequence which will
hang GFX IP if not already in GFXOFF.

To help this problem, flush any delayed work for GFXOFF early in
s2idle entry sequence to ensure that it's off when RLC is changed.

commit 4b31b92b14 ("drm/amdgpu: complete gfxoff allow signal during
suspend without delay") modified power gating flow so that if called
in s0ix that it ensured that GFXOFF wasn't put in work queue but
instead processed immediately.

This is dead code due to commit 10cb67eb8a ("drm/amdgpu: skip
CG/PG for gfx during S0ix") because GFXOFF will now not be explicitly
called as part of the suspend entry code.  Remove that dead code.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Tim Huang <tim.huang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-16 11:35:14 -04:00
Tim Huang
603b9a575d drm/amdgpu: skip fence GFX interrupts disable/enable for S0ix
GFX v11.0.1 reported fence fallback timer expired issue on
SDMA and GFX rings after S0ix resume. This is generated by
EOP interrupts are disabled when S0ix suspend but fails to
re-enable when resume because of the GFX is in GFXOFF.

[  203.349571] [drm] Fence fallback timer expired on ring sdma0
[  203.349572] [drm] Fence fallback timer expired on ring gfx_0.0.0
[  203.861635] [drm] Fence fallback timer expired on ring gfx_0.0.0

For S0ix, GFX is in GFXOFF state, avoid to touch the GFX registers
to configure the fence driver interrupts for rings that belong to GFX.
The interrupts configuration will be restored by GFXOFF exit.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-16 11:34:57 -04:00
Lijo Lazar
b5cdadedaa drm/amdgpu: Remove gfxoff check in GFX v9.4.3
GFXOFF feature is not there for GFX 9.4.3 ASICs.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-16 11:34:50 -04:00
James Zhu
400a39f1ec drm/amdgpu: skip xcp drm device allocation when out of drm resource
Return 0 when drm device alloc failed with -ENOSPC in
order to  allow amdgpu drive loading. But the xcp without
drm device node assigned won't be visiable in user space.
This helps amdgpu driver loading on system which has more
than 64 nodes, the current limitation.

The proposal to add more drm nodes is discussed in public,
which will support up to 2^20 nodes totally.
kernel drm:
https://lore.kernel.org/lkml/20230724211428.3831636-1-michal.winiarski@intel.com/T/
libdrm:
https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/305

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-16 11:34:11 -04:00
Samir Dhume
dd12b858c2 drm/amdgpu/vcn: Skip vcn power-gating change for sriov
CG/PG is handled on the host side.

Signed-off-by: Samir Dhume <samir.dhume@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-16 11:33:59 -04:00
Samir Dhume
d34fecc6e9 drm/amdgpu/jpeg: sriov support for jpeg_v4_0_3
initialization table handshake with mmsch

Signed-off-by: Samir Dhume <samir.dhume@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-16 11:33:59 -04:00
Srinivasan Shanmugam
b828e1004c drm/amdgpu: Replace ternary operator with min() in 'amdgpu_iomem_write'
Fixes the following coccicheck:

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:2482:16-17: WARNING opportunity for min()

min() macro is defined in include/linux/minmax.h. It avoids multiple
evaluations of the arguments when non-constant and performs strict
type-checking.

Cc: Guchun Chen <guchun.chen@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:08:30 -04:00
Mario Limonciello
9366c2e87d drm/amd: Rename AMDGPU_PP_SENSOR_GPU_POWER
Use the clearer name `AMDGPU_PP_SENSOR_GPU_AVG_POWER` instead.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:08:30 -04:00
GUO Zihua
e8b2ad875f drm/amdgpu: Remove duplicated includes
Remove duplicated includes in amdgpu_amdkfd_gpuvm.c and amdgpu_ttm.c.
Resolves checkincludes message.

Signed-off-by: GUO Zihua <guozihua@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:08:29 -04:00
Alex Deucher
4d6fc55ab1 drm/amdgpu: expand runpm parameter
Allow the user to specify -2 as auto enabled with displays.

By default we don't enter runtime suspend when there are
displays attached because it does not work well in some
desktop environments due to the driver sending hotplug
events on resume in case any new displays were attached
while the GPU was powered down.  Some users still want
this functionality though, so this lets you enable it.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2428
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:08:29 -04:00
Aurabindo Pillai
e94e787e37 drm/amd: Remove freesync video mode amdgpu parameter
[Why&How]
Freesync Video mode was enabled by default. Hence no need for the module
parameter, so remove it completely

Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:08:29 -04:00
Samir Dhume
d117fd2964 drm/amdgpu/vcn: sriov support for vcn_v4_0_3
initialization table handshake with mmsch

Signed-off-by: Samir Dhume <samir.dhume@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:08:28 -04:00
Srinivasan Shanmugam
44fd83e920 drm/amdgpu: Replace ternary operator with min() in 'amdgpu_iomem_read'
Fixes the following coccicheck:

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:2427:16-17: WARNING opportunity for min()

min() macro is defined in include/linux/minmax.h. It avoids multiple
evaluations of the arguments when non-constant and performs strict
type-checking.

Cc: Guchun Chen <guchun.chen@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:08:28 -04:00
Samir Dhume
945355c96e drm/amdgpu/vcn: change end doorbell index for vcn_v4_0_3
For sriov, doorbell index for vcn0 for AID needs to be on
32 byte boundary so we need to move the vcn end doorbell

Signed-off-by: Samir Dhume <samir.dhume@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:08:28 -04:00
Eric Huang
3831989d62 drm/amdkfd: workaround address watch clearing bug for gfx v9.4.2
KFD currently relies on MEC FW to clear tcp watch control
register on UNMAP_PROCESS, but FW doesn't work on it,
which is a bug. So the solution is to clear the register
as gfx v9 in KFD.

Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Reviewed-by: Jonathan Kim <jonathan.kim@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:08:27 -04:00
Samir Dhume
dba24294ff drm/amdgpu/jpeg: mmsch_v4_0_3 requires doorbell on 32 byte boundary
BASE: VCN0 unified (32 byte boundary)
BASE+4: MJPEG0
BASE+5: MJPEG1
BASE+6: MJPEG2
BASE+7: MJPEG3
BASE+12: MJPEG4
BASE+13: MJPEG5
BASE+14: MJPEG6
BASE+15: MJPEG7

Signed-off-by: Samir Dhume <samir.dhume@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:08:27 -04:00
Samir Dhume
a31c114bcf drm/amdgpu/vcn: mmsch_v4_0_3 requires doorbell on 32 byte boundary
Align on 32 byte boundary.

Signed-off-by: Samir Dhume <samir.dhume@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:08:27 -04:00
Samir Dhume
8d72444288 drm/amdgpu/vcn: Add MMSCH v4_0_3 support for sriov
The structures are the same as v4_0 except for the
init header

Signed-off-by: Samir Dhume <samir.dhume@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:08:27 -04:00
Candice Li
b81fde0dfe drm/amdgpu: Add I2C EEPROM support on smu v13_0_6
Support I2C EEPROM on smu v13_0_6.

v2: Move IP_VERSION(13, 0, 6) ahead of IP_VERSION(13, 0, 10).

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:08:27 -04:00
Xiongfeng Wang
bdacd16afa drm/amd: Use pci_dev_id() to simplify the code
PCI core API pci_dev_id() can be used to get the BDF number for a pci
device. We don't need to compose it mannually. Use pci_dev_id() to
simplify the code a little bit.

Signed-off-by: Xiongfeng Wang <wangxiongfeng2@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:07:42 -04:00
Srinivasan Shanmugam
d0d6928058 drm/amdgpu: Fix identifier names to function definition arguments in atom.h
Fixes the following:

WARNING: function definition argument 'struct card_info *' should also have an identifier name
WARNING: function definition argument 'uint32_t' should also have an identifier name
WARNING: function definition argument 'void *' should also have an identifier name
WARNING: function definition argument 'struct atom_context *' should also have an identifier name
WARNING: function definition argument 'int' should also have an identifier name
WARNING: function definition argument 'uint32_t *' should also have an identifier name
WARNING: Unnecessary space before function pointer name
ERROR: space prohibited after that '*' (ctx:BxW)
CHECK: Prefer kernel type 'u32' over 'uint32_t'

Cc: Guchun Chen <guchun.chen@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:07:42 -04:00
YiPeng Chai
1b98a5f8e0 drm/amdgpu: mode1 reset needs to recover mp1 for mp0 v13_0_10
Mode1 reset needs to recover mp1 in fatal error case
for mp0 v13_0_10.

v2:
  Define a macro to wrap psp function calls.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:07:41 -04:00
Hawking Zhang
8b3a7a707c drm/amdgpu: Remove unnecessary ras cap check
RAS global isr will only be invoked by hardware
interrupt. Don't need to query ras capability in isr
In addition, amdgpu_ras_interrupt_fatal_error_handler
ensures the isr won't be called from guest linux
side by accident. The RAS cap check in isr that
introduced to fix sriov crash is not needed any more

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:07:41 -04:00
Jiadong Zhu
1e9e15dcf4 drm/amdgpu: disable mcbp if parameter zero is set
The parameter amdgpu_mcbp shall have priority against the default value
calculated from the chip version.
User could disable mcbp by setting the parameter mcbp as zero.

v2: do not trigger preemption in sw ring muxer when mcbp is disabled.

Signed-off-by: Jiadong Zhu <Jiadong.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 17:44:02 -04:00
Srinivasan Shanmugam
4c452b5c7d drm/amdgpu: Fix missing comment for mb() in 'amdgpu_device_aper_access'
This patch adds the missing code comment for memory barrier

WARNING: memory barrier without comment
+                       mb();

WARNING: memory barrier without comment
+                       mb();

Cc: Guchun Chen <guchun.chen@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 17:40:44 -04:00
Alex Deucher
6be2ad4f00 drm/amdgpu: don't allow userspace to create a doorbell BO
We need the domains in amdgpu_drm.h for the kernel driver to manage
the pool, but we don't want userspace using it until the code
is ready.  So reject for now.

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-11 14:48:07 -04:00
Alex Deucher
c99a2e7ae2 drm/amdkfd: drop IOMMUv2 support
Now that we use the dGPU path for all APUs, drop the
IOMMUv2 support.

v2: drop the now unused queue manager functions for gfx7/8 APUs

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-11 14:47:25 -04:00
Uros Bizjak
9e761bff03 drm/amdgpu: Use local64_try_cmpxchg in amdgpu_perf_read
Use local64_try_cmpxchg instead of local64_cmpxchg (*ptr, old, new) == old
in amdgpu_perf_read.  x86 CMPXCHG instruction returns success in ZF flag,
so this change saves a compare after cmpxchg (and related move instruction
in front of cmpxchg).

Also, try_cmpxchg implicitly assigns old *ptr value to "old" when cmpxchg
fails. There is no need to re-read the value in the loop.

No functional change intended.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Cc: David Airlie <airlied@gmail.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 18:08:51 -04:00
Asad Kamal
59070fd9cc drm/amdgpu: Add pci usage to nbio v7.9
Add implementation to get pcie usage for nbio v7.9.

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Shiwu Zhang <shiwu.zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:46:05 -04:00
Asad Kamal
8d759dc664 drm/amdgpu: Add pcie usage callback to nbio
Add a callback in nbio to get pcie usage

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Shiwu Zhang <shiwu.zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:46:05 -04:00
Candice Li
bc0f80802d drm/amdgpu: Extend poison mode check to SDMA/VCN/JPEG
Treat SDMA/VCN/JPEG as RAS capable IP blocks in poison mode.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:46:05 -04:00
Emily Deng
f734b2133c drm/amdgpu/irq: Move irq resume to the beginning
Need to move irq resume to the beginning of reset sriov, or if
one interrupt occurs before irq resume, then the irq won't work anymore.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:46:04 -04:00
Tao Zhou
7692e1ee24 drm/amdgpu: add RAS fatal error handler for NBIO v7.9
Register RAS fatal error interrupt and add handler.

v2: only register NBIO RAS for dGPU platform.
    change nbio_v7_9_set_ras_controller_irq_state and nbio_v7_9_set_ras_err_event_athub_irq_state
    to dummy functions.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:46:04 -04:00
Srinivasan Shanmugam
657db07b32 drm/amdgpu: Fix identation issues in 'kgd_gfx_v9_program_trap_handler_settings'
Fixes the following:

ERROR: code indent should use tabs where possible
WARNING: please, no spaces at the start of a line

Cc: Guchun Chen <guchun.chen@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:46:04 -04:00
Alex Deucher
81af32520e drm/amdgpu/gfx11: only enable CP GFX shadowing on SR-IOV
This is only required for SR-IOV world switches, but it
adds additional latency leading to reduced performance in
some benchmarks.  Disable for now on bare metal.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:46:04 -04:00
Lijo Lazar
7957ec80ef drm/amdgpu: Add FRU sysfs nodes only if needed
Create sysfs nodes for FRU data only if FRU data is available. Move the
logic to FRU specific file.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:45:55 -04:00
Ran Sun
20c7435447 drm/amdgpu: Clean up errors in vcn_v3_0.c
Fix the following errors reported by checkpatch:

ERROR: space required before the open brace '{'
ERROR: "foo * bar" should be "foo *bar"
ERROR: space required before the open parenthesis '('
ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:44:00 -04:00
Ran Sun
7bb8c4f6a4 drm/amdgpu: Clean up errors in tonga_ih.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:58 -04:00
Ran Sun
7b57c54c96 drm/amdgpu: Clean up errors in gfx_v7_0.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line
ERROR: trailing statements should be on next line
ERROR: open brace '{' following struct go on the same line
ERROR: space prohibited before that '++' (ctx:WxB)

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:56 -04:00
Ran Sun
2b2b5858f5 drm/amdgpu: Clean up errors in vcn_v4_0.c
Fix the following errors reported by checkpatch:

spaces required around that '==' (ctx:VxV)
ERROR: space required before the open parenthesis '('
ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:54 -04:00
Ran Sun
c8a1439699 drm/amdgpu: Clean up errors in uvd_v3_1.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:52 -04:00
Ran Sun
599f7c8b85 drm/amdgpu: Clean up errors in mxgpu_vi.c
Fix the following errors reported by checkpatch:

ERROR: spaces required around that '-=' (ctx:WxV)

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:51 -04:00
Ran Sun
939a392f07 drm/amdgpu: Clean up errors in nv.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:49 -04:00
Ran Sun
baa5ede875 drm/amdgpu: Clean up errors in amdgpu_virt.c
Fix the following errors reported by checkpatch:

ERROR: space required before the open parenthesis '('

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:47 -04:00
Ran Sun
1b01c010d7 drm/amdgpu: Clean up errors in amdgpu_ring.h
Fix the following errors reported by checkpatch:

ERROR: spaces required around that ':' (ctx:VxW)

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:45 -04:00
Ran Sun
7b7fbabbff drm/amdgpu: Clean up errors in amdgpu_trace.h
Fix the following errors reported by checkpatch:

ERROR: space required after that ',' (ctx:VxV)
ERROR: "foo* bar" should be "foo *bar"

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:43 -04:00
Ran Sun
91aafa3c4e drm/amdgpu: Clean up errors in mes_v11_0.c
Fix the following errors reported by checkpatch:

ERROR: else should follow close brace '}'

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:42 -04:00
Ran Sun
98268d4033 drm/amdgpu: Clean up errors in amdgpu_atombios.h
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:40 -04:00
Ran Sun
06d82d87b4 drm/amdgpu: Clean up errors in soc21.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:38 -04:00
Ran Sun
18ef754488 drm/amdgpu: Clean up errors in dce_v8_0.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line
ERROR: code indent should use tabs where possible
ERROR: space required before the open brace '{'

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:36 -04:00
Ran Sun
665ba81b4a drm/amdgpu/jpeg: Clean up errors in vcn_v1_0.c
Fix the following errors reported by checkpatch:

ERROR: space required before the open parenthesis '('
ERROR: space prohibited after that '~' (ctx:WxW)

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:34 -04:00
Ran Sun
e2515e2b90 drm/amdgpu: Clean up errors in mxgpu_nv.c
Fix the following errors reported by checkpatch:

ERROR: else should follow close brace '}'
ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:32 -04:00
Ran Sun
2b77f199a5 drm/amdgpu: Clean up errors in dce_v10_0.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:30 -04:00
Ran Sun
7c29b40236 drm/jpeg: Clean up errors in jpeg_v2_0.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:28 -04:00
Ran Sun
a788b54f3d drm/amdgpu: Clean up errors in uvd_v7_0.c
Fix the following errors reported by checkpatch:

ERROR: spaces required around that ':' (ctx:VxE)
that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:26 -04:00
Ran Sun
7163dadea2 drm/amdgpu/atomfirmware: Clean up errors in amdgpu_atomfirmware.c
Fix the following errors reported by checkpatch:

ERROR: spaces required around that '>=' (ctx:WxV)
ERROR: spaces required around that '!=' (ctx:WxV)
ERROR: code indent should use tabs where possible

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:23 -04:00
Ran Sun
f291f9b9db drm/amdgpu: Clean up errors in mmhub_v9_4.c
Fix the following errors reported by checkpatch:

ERROR: code indent should use tabs where possible
ERROR: space required before the open parenthesis '('

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:22 -04:00
Ran Sun
1f45f1c592 drm/amdgpu: Clean up errors in vega20_ih.c
Fix the following errors reported by checkpatch:

ERROR: trailing statements should be on next line
ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:20 -04:00
Ran Sun
46eb29b867 drm/amdgpu: Clean up errors in ih_v6_0.c
Fix the following errors reported by checkpatch:

ERROR: trailing statements should be on next line
ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:18 -04:00
Ran Sun
08110c26ce drm/amdgpu: Clean up errors in amdgpu_psp.h
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line
ERROR: open brace '{' following enum go on the same line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:17 -04:00
Ran Sun
042a70e43a drm/amdgpu: Clean up errors in vce_v3_0.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:15 -04:00
Ran Sun
9c7f00f7d1 drm/amdgpu: Clean up errors in cik_ih.c
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:43:13 -04:00
Ruan Jinjie
3b780089fd drm/amdgpu: Remove a lot of unnecessary ternary operators
There are many ternary operators, the true or false judgement
of which is unnecessary in C language semantics.

Signed-off-by: Ruan Jinjie <ruanjinjie@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:39:56 -04:00
Alex Deucher
73b0648179 drm/amdgpu: fix possible UAF in amdgpu_cs_pass1()
Since the gang_size check is outside of chunk parsing
loop, we need to reset i before we free the chunk data.

Suggested by Ye Zhang (@VAR10CK) of Baidu Security.

Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:39:40 -04:00
Lijo Lazar
7748ce5b69 drm/amdgpu: Report vbios version instead of PN
Report VBIOS version in vbios_version sysfs node instead of part number.
Part number remains constant for a SKU type.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:09 -04:00
Shashank Sharma
664c3b03f9 drm/amdgpu: cleanup MES process level doorbells
MES allocates process level doorbells, but there is no userspace
client to consume it. It was only being used for the MES ring
tests (in kernel), and was written by kernel doorbell write.

The previous patch of this series has changed the MES ring test code to
use kernel level MES doorbells. This patch now cleans up the process level
doorbell allocation code which is not required.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian Koenig <christian.koenig@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
Signed-off-by: Arvind Yadav <arvind.yadav@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:07 -04:00
Shashank Sharma
e3cbb1f404 drm/amdgpu: use doorbell mgr for MES kernel doorbells
This patch:
- Removes the existing doorbell management code, and its variables
  from the doorbell_init function, it will be done in doorbell
  manager now.
- uses the doorbell page created for MES kernel level needs (doorbells
  for MES self tests)
- current MES code was allocating MES doorbells in MES process context,
  but those were getting written using kernel doorbell calls. This patch
  instead allocates a MES kernel doorbell for this (in add_hw_queue).

V2: Create an extra page of doorbells for MES during kernel doorbell
    creation (Alex)
V4: Move MES doorbell size and page offset objects in this patch from
    patch 6.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian Koenig <christian.koenig@amd.com>
Reviewed-by: Christian Koenig <christian.koenig@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
Signed-off-by: Arvind Yadav <arvind.yadav@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:07 -04:00