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mirror of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2025-09-04 20:19:47 +08:00
Commit Graph

641 Commits

Author SHA1 Message Date
Ingo Molnar
41cb08555c treewide, timers: Rename from_timer() to timer_container_of()
Move this API to the canonical timer_*() namespace.

[ tglx: Redone against pre rc1 ]

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/aB2X0jCKQO56WdMt@gmail.com
2025-06-08 09:07:37 +02:00
Linus Torvalds
a060795111 sophgo: add driver for CV18XX series
mailbox core: misc cleanup
 qcom: add SM7150 APCS compatible
       apcs: added separate clock node
 imx: fix tx doorbell send
 microchip: misc compile option fix
 mediatek: Refine GCE_GCTL_VALUE setting
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Merge tag 'mailbox-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox

Pull mailbox updates from Jassi Brar:
 "Core:
   - misc cleanup

  sophgo:
   - add driver for CV18XX series

  qcom:
   - add SM7150 APCS compatible
   - apcs: added separate clock node

  imx:
   - fix tx doorbell send

  microchip:
   - misc compile option fix

  mediatek:
   - Refine GCE_GCTL_VALUE setting"

* tag 'mailbox-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox:
  mailbox: qcom-apcs-ipc: Assign OF node to clock controller child device
  dt-bindings: mailbox: qcom,apcs: Add separate node for clock-controller
  dt-bindings: mailbox: qcom: Add the SM7150 APCS compatible
  mailbox: sophgo: add mailbox driver for CV18XX series SoC
  dt-bindings: mailbox: add Sophgo CV18XX series SoC
  mailbox: Use guard/scoped_guard for spinlock
  mailbox: Use guard/scoped_guard for con_mutex
  mailbox: Remove devm_mbox_controller_unregister
  mailbox: Propagate correct error return value
  mailbox: Not protect module_put with spin_lock_irqsave
  mailbox: Use dev_err when there is error
  mailbox: mtk-cmdq: Refine GCE_GCTL_VALUE setting
  mailbox: imx: Fix TXDB_V2 sending
  mailbox: mchp-ipc-sbi: Fix COMPILE_TEST build error
2025-06-02 10:58:00 -07:00
Stephan Gerhold
d0b497df02 mailbox: qcom-apcs-ipc: Assign OF node to clock controller child device
Currently, the child device for the clock controller inside the APCS block
is created without any OF node assigned, so the drivers need to rely on the
parent device for obtaining any resources.

Add support for defining the clock controller inside a "clock-controller"
subnode to break up circular dependencies between the mailbox and required
parent clocks of the clock controller. For backwards compatibility, if the
subnode is not defined, reuse the OF node from the parent device.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-05-29 10:01:35 -05:00
Yuntao Dai
529015a0e7 mailbox: sophgo: add mailbox driver for CV18XX series SoC
Add mailbox controller driver for CV18XX SoCs, which provides 8 channels
and each channel has an 8-byte FIFO.

Signed-off-by: Yuntao Dai <d1581209858@live.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-05-26 16:23:39 -05:00
Peng Fan
2149ec83ef mailbox: Use guard/scoped_guard for spinlock
Use guard and scoped_guard for chan->lock and mbox->poll_hrt_lock to
simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-05-26 16:23:39 -05:00
Peng Fan
16da9a653c mailbox: Use guard/scoped_guard for con_mutex
Use guard and scoped_guard for con_mutex to simplify code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-05-26 16:23:39 -05:00
Peng Fan
9be022476f mailbox: Remove devm_mbox_controller_unregister
Commit e898d9cdd3a9("mailbox: Add device-managed registration functions")
introduced device-managed API for mailbox, but in the past 7 years,
there is no user for devm_mbox_controller_unregister. So remove it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-05-26 16:23:39 -05:00
Peng Fan
cb7e2ec370 mailbox: Propagate correct error return value
In case of_property_match_string fails, it makes more sense
to return its error value to caller, not force the value to
ERR_PTR(-EINVAL).

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-05-26 16:23:39 -05:00
Peng Fan
dddbd233e6 mailbox: Not protect module_put with spin_lock_irqsave
&chan->lock is not supposed to protect 'chan->mbox'.
And in __mbox_bind_client, try_module_get is also not protected
by &chan->lock. So move module_put out of the lock protected
region.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-05-26 16:23:39 -05:00
Peng Fan
8da4988b6e mailbox: Use dev_err when there is error
Use dev_err to show the error log instead of using dev_dbg.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-05-26 16:23:39 -05:00
Jason-JH Lin
9fcebcb37c mailbox: mtk-cmdq: Refine GCE_GCTL_VALUE setting
Add cmdq_gctl_value_toggle() to configure GCE_CTRL_BY_SW and GCE_DDR_EN
together in the same GCE_GCTL_VALUE register.

For the SoCs whose GCE is located in MMINFRA and uses MMINFRA_AO power,
this allows it to be written without enabling the clocks. Otherwise, all
GCE registers should be written after the GCE clocks are enabled.
Move this function into cmdq_runtime_resume() and cmdq_runtime_suspend()
to ensure it is called when the GCE clock is enabled.

Fixes: 7abd037aa5 ("mailbox: mtk-cmdq: add gce ddr enable support flow")
Signed-off-by: Jason-JH Lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-05-26 16:23:39 -05:00
Peng Fan
f5cb07ec6a mailbox: imx: Fix TXDB_V2 sending
i.MX95 features several processing domains, Cortex-M7, Cortex-A55
secure, Cortex-A55 non-secure. Each domain could communicate with
SCMI firmware with a dedicated MU. But the current NXP SCMI firmware
is not a RTOS, all processing logic codes are in interrupt context.
So if high priority Cortex-M7 is communicating with SCMI firmware and
requires a bit more time to handle the SCMI call, Linux MU TXDB_V2
will be timeout with high possiblity in 1000us(the current value in
imx-mailbox.c). Per NXP SCMI firmware design, if timeout, there is
no recover logic, so SCMI agents should never timeout and always
wait until the check condition met.

Based on the upper reason, enlarge the timeout value to 10ms which
is less chance to timeout, and retry if timeout really happends.

Fixes: 5bfe4067d3 ("mailbox: imx: support channel type tx doorbell v2")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-05-26 16:23:39 -05:00
Yue Haibing
d635ba4207 mailbox: mchp-ipc-sbi: Fix COMPILE_TEST build error
If COMPILE_TEST is y but RISCV_SBI is n, build fails:

drivers/mailbox/mailbox-mchp-ipc-sbi.c: In function 'mchp_ipc_sbi_chan_send':
drivers/mailbox/mailbox-mchp-ipc-sbi.c:119:23: error: storage size of 'ret' isn't known
	struct sbiret ret;
	              ^~~
  CC      drivers/nvmem/lpc18xx_otp.o
drivers/mailbox/mailbox-mchp-ipc-sbi.c:121:15: error: implicit declaration of function 'sbi_ecall' [-Werror=implicit-function-declaration]
	ret = sbi_ecall(SBI_EXT_MICROCHIP_TECHNOLOGY, command, channel,
	      ^~~~~~~~~

move COMPILE_TEST to ARCH_MICROCHIP dependency as other drivers.

Fixes: e4b1d67e71 ("mailbox: add Microchip IPC support")
Signed-off-by: Yue Haibing <yuehaibing@huawei.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-05-26 16:23:38 -05:00
Jiri Slaby (SUSE)
b9a7f080e7 mailbox: qcom-ipcc: Switch to irq_domain_create_tree()
irq_domain_add_tree() is going away as being obsolete now. Switch to
the preferred irq_domain_create_tree(). That differs in the first
parameter: It takes more generic struct fwnode_handle instead of struct
device_node. Therefore, of_fwnode_handle() is added around the
parameter.

Note some of the users can likely use dev->fwnode directly instead of
indirect of_fwnode_handle(dev->of_node). But dev->fwnode is not
guaranteed to be set for all, so this has to be investigated on case to
case basis (by people who can actually test with the HW).

[ tglx: Fix up subject prefix ]

Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20250319092951.37667-23-jirislaby@kernel.org
2025-05-16 21:06:09 +02:00
Thomas Gleixner
8fa7292fee treewide: Switch/rename to timer_delete[_sync]()
timer_delete[_sync]() replaces del_timer[_sync](). Convert the whole tree
over and remove the historical wrapper inlines.

Conversion was done with coccinelle plus manual fixups where necessary.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2025-04-05 10:30:12 +02:00
Linus Torvalds
7f2ff7b626 misc: Constify amba_id table
pcc: cleanup and refactoring of shmem and irq handling
 qcom: add MSM8226 compatible
 fsl,mu: add i.MX94 compatible
 core: misc rejig of header includes
 	  minor const fixes
 mediatek: remove cl in struct cmdq_pkt
 tegra: define dimensioning masks in SoC data
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Merge tag 'mailbox-v6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox

Pull mailbox updates from Jassi Brar:
 "Core:
   - misc rejig of header includes
   - minor const fixes

  Misc:
   - constify amba_id table

  pcc:
   - cleanup and refactoring of shmem and irq handling

  qcom:
   - add MSM8226 compatible

  fsl,mu:
   - add i.MX94 compatible

  mediatek:
   - remove cl in struct cmdq_pkt

  tegra:
   - define dimensioning masks in SoC data"

* tag 'mailbox-v6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox: (25 commits)
  mailbox: Remove unneeded semicolon
  mailbox: pcc: Refactor and simplify check_and_ack()
  mailbox: pcc: Always map the shared memory communication address
  mailbox: pcc: Refactor error handling in irq handler into separate function
  mailbox: pcc: Use acpi_os_ioremap() instead of ioremap()
  mailbox: pcc: Return early if no GAS register from pcc_mbox_cmd_complete_check
  mailbox: pcc: Drop unnecessary endianness conversion of pcc_hdr.flags
  mailbox: pcc: Always clear the platform ack interrupt first
  mailbox: pcc: Fix the possible race in updation of chan_in_use flag
  dt-bindings: mailbox: qcom: add compatible for MSM8226 SoC
  dt-bindings: mailbox: fsl,mu: Add i.MX94 compatible
  MAINTAINERS: add mailbox API's tree type and location
  mailbox: remove unused header files
  mailbox: explicitly include <linux/bits.h>
  mailbox: sort headers alphabetically
  mailbox: don't protect of_parse_phandle_with_args with con_mutex
  mailbox: use error ret code of of_parse_phandle_with_args()
  mailbox: arm_mhuv2: Constify amba_id table
  mailbox: arm_mhu_db: Constify amba_id table
  mailbox: arm_mhu: Constify amba_id table
  ...
2025-03-29 18:25:34 -07:00
Chen Ni
1ec12fd31e mailbox: Remove unneeded semicolon
Remove unnecessary semicolons reported by Coccinelle/coccicheck and the
semantic patch at scripts/coccinelle/misc/semicolon.cocci.

Signed-off-by: Chen Ni <nichen@iscas.ac.cn>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:26 -05:00
Sudeep Holla
2475b36401 mailbox: pcc: Refactor and simplify check_and_ack()
The existing check_and_ack() function had unnecessary complexity. The
logic could be streamlined to improve code readability and maintainability.

The command update register needs to be updated in order to acknowledge
the platform notification through type 4 channel. So it can be done
unconditionally. Currently it is complicated just to make use of
pcc_send_data() which also executes the same updation.

In order to simplify, let us just ring the doorbell directly from
check_and_ack() instead of calling into pcc_send_data(). While at it,
rename it into pcc_chan_check_and_ack() to maintain consistency in the
driver.

Acked-by: Huisong Li <lihuisong@huawei.com>
Tested-by: Adam Young <admiyo@os.amperecomputing.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:26 -05:00
Sudeep Holla
fa362ffafa mailbox: pcc: Always map the shared memory communication address
Currently the shared memory communication address was mapped by the
mailbox client drivers leading to all sorts of inconsistencies.

It also has resulted in the inconsistent attributes used while mapping
the shared memory regions.

In order to remove/eliminate any issues, let us ensures the shared
memory address is always mapped and unmapped when the PCC channels are
requested and release.

We need to map them as the ACPI PCCT associates these shared memory
with each channel subspace and may need use the status or the flags in
the headers of those shared memory communication address regions to
manage the transport/channel.

Note, until all the drivers using PCC start using this mapped shmem,
there might be double mapping of the shared memory address. This
shouldn't have any impact on existing mbox client drivers.

Since there are no users of pcc_chan_ioremap() and also it is mapped
by default, we can stop exporting it and merge the functionality into
pcc_mbox_request_channel().

Acked-by: Huisong Li <lihuisong@huawei.com>
Tested-by: Huisong Li <lihuisong@huawei.com>
Tested-by: Adam Young <admiyo@os.amperecomputing.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:26 -05:00
Sudeep Holla
3a675f5041 mailbox: pcc: Refactor error handling in irq handler into separate function
The existing error handling logic in pcc_mbox_irq() is intermixed with the
main flow of the function. The command complete check and the complete
complete update/acknowledgment are nicely factored into separate functions.

Moves error detection and clearing logic into a separate function called:
pcc_mbox_error_check_and_clear() by extracting error-handling logic from
pcc_mbox_irq().

This ensures error checking and clearing are handled separately and it
improves maintainability by keeping the IRQ handler focused on processing
events.

Acked-by: Huisong Li <lihuisong@huawei.com>
Tested-by: Huisong Li <lihuisong@huawei.com>
Tested-by: Adam Young <admiyo@os.amperecomputing.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:26 -05:00
Sudeep Holla
d181acea5b mailbox: pcc: Use acpi_os_ioremap() instead of ioremap()
The Platform Communication Channel (PCC) mailbox driver currently uses
ioremap() to map channel shared memory regions. However it is preferred
to use acpi_os_ioremap(), which is mapping function specific to EFI/ACPI
defined memory regions. It ensures that the correct memory attributes
are applied when mapping ACPI-provided regions.

While at it, also add checks for handling any errors with the mapping.

Acked-by: Huisong Li <lihuisong@huawei.com>
Tested-by: Huisong Li <lihuisong@huawei.com>
Tested-by: Adam Young <admiyo@os.amperecomputing.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:26 -05:00
Sudeep Holla
4119a44c71 mailbox: pcc: Return early if no GAS register from pcc_mbox_cmd_complete_check
pcc_mbox_cmd_complete_check() accesses pchan->cmd_complete.gas to check
command completion status. Even if GAS is NULL, pcc_chan_reg_read() gets
called which returns success doing nothing and then we return.

Add an early return if pchan->cmd_complete.gas == NULL before performing
any operations.

Acked-by: Huisong Li <lihuisong@huawei.com>
Tested-by: Huisong Li <lihuisong@huawei.com>
Tested-by: Adam Young <admiyo@os.amperecomputing.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:25 -05:00
Sudeep Holla
29237e6df4 mailbox: pcc: Drop unnecessary endianness conversion of pcc_hdr.flags
The Sparse static checker flags a type mismatch warning related to
endianness conversion:

  |  warning: incorrect type in argument 1 (different base types)
  |     expected restricted __le32 const [usertype] *p
  |     got unsigned int *

This is because an explicit endianness conversion (le32_to_cpu()) was
applied unnecessarily to a pcc_hdr.flags field that is already in
little-endian format.

The PCC driver is only enabled on little-endian kernels due to its
dependency on ACPI and EFI, making the explicit conversion unnecessary.

The redundant conversion occurs in pcc_chan_check_and_ack() for the
pcc_hdr.flags field. Drop this unnecessary endianness conversion of
pcc_hdr.flags.

Also drop the redundant PCC_ACK_FLAG_MASK definition and use the
more appropriate and already defined PCC_CMD_COMPLETION_NOTIFY.

Acked-by: Huisong Li <lihuisong@huawei.com>
Tested-by: Adam Young <admiyo@os.amperecomputing.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:25 -05:00
Sudeep Holla
cf1338c0e0 mailbox: pcc: Always clear the platform ack interrupt first
The PCC mailbox interrupt handler (pcc_mbox_irq()) currently checks
for command completion flags and any error status before clearing the
interrupt.

The below sequence highlights an issue in the handling of PCC mailbox
interrupts, specifically when dealing with doorbell notifications and
acknowledgment between the OSPM and the platform where type3 and type4
channels are sharing the interrupt.

-------------------------------------------------------------------------
| T |       Platform Firmware         |    OSPM/Linux PCC driver        |
|---|---------------------------------|---------------------------------|
| 1 |                                 | Build message in shmem          |
| 2 |                                 | Ring Type3 chan doorbell        |
| 3 | Receives the doorbell interrupt |                                 |
| 4 | Process the message from OSPM   |                                 |
| 5 | Build response for the message  |                                 |
| 6 | Ring Platform ACK interrupt on  |                                 |
|   |  Type3 chan to OSPM             | Received the interrupt          |
| 7 | Build Notification in Type4 Chan|                                 |
| 8 |                                 | Start processing interrupt in   |
|   |                                 |  pcc_mbox_irq() handler         |
| 9 |                                 | Enter PCC handler for Type4 chan|
|10 |                                 | Check command complete cleared  |
|11 |                                 | Read the notification           |
|12 |                                 | Clear Platform ACK interrupt    |
|   | No effect from the previous step yet as the Platform ACK          |
|   |  interrupt has not yet been triggered for this channel            |
|13 | Ring Platform ACK interrupt on  |                                 |
|   | Type4 chan to OSPM              |                                 |
|14 |                                 | Enter PCC handler for Type3 chan|
|15 |                                 | Command complete is set.        |
|16 |                                 | Read the response.              |
|17 |                                 | Clear Platform ACK interrupt    |
|18 |                                 | Leave PCC handler for Type3     |
|19 |                                 | Leave pcc_mbox_irq() handler    |
|20 |                                 | Re-enter pcc_mbox_irq() handler |
|21 |                                 | Enter PCC handler for Type4 chan|
|22 |                                 | Leave PCC handler for Type4 chan|
|23 |                                 | Enter PCC handler for Type3 chan|
|24 |                                 | Leave PCC handler for Type3 chan|
|25 |                                 | Leave pcc_mbox_irq() handler    |
-------------------------------------------------------------------------

The key issue occurs when OSPM tries to acknowledge platform ack
interrupt for a notification which is ready to be read and processed
but the interrupt itself is not yet triggered by the platform.

This ineffective acknowledgment leads to an issue later in time where
the interrupt remains pending as we exit the interrupt handler without
clearing the platform ack interrupt as there is no pending response or
notification. The interrupt acknowledgment order is incorrect.

To resolve this issue, the platform acknowledgment interrupt should
always be cleared before processing the interrupt for any notifications
or response.

Reported-by: Robbie King <robbiek@xsightlabs.com>
Reviewed-by: Huisong Li <lihuisong@huawei.com>
Tested-by: Huisong Li <lihuisong@huawei.com>
Tested-by: Adam Young <admiyo@os.amperecomputing.com>
Tested-by: Robbie King <robbiek@xsightlabs.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:25 -05:00
Huisong Li
9779d45c74 mailbox: pcc: Fix the possible race in updation of chan_in_use flag
The function mbox_chan_received_data() calls the Rx callback of the
mailbox client driver. The callback might set chan_in_use flag from
pcc_send_data(). This flag's status determines whether the PCC channel
is in use.

However, there is a potential race condition where chan_in_use is
updated incorrectly due to concurrency between the interrupt handler
(pcc_mbox_irq()) and the command sender(pcc_send_data()).

The 'chan_in_use' flag of a channel is set to true after sending a
command. And the flag of the new command may be cleared erroneous by
the interrupt handler afer mbox_chan_received_data() returns,

As a result, the interrupt being level triggered can't be cleared in
pcc_mbox_irq() and it will be disabled after the number of handled times
exceeds the specified value. The error log is as follows:

  |  kunpeng_hccs HISI04B2:00: PCC command executed timeout!
  |  kunpeng_hccs HISI04B2:00: get port link status info failed, ret = -110
  |  irq 13: nobody cared (try booting with the "irqpoll" option)
  |  Call trace:
  |   dump_backtrace+0x0/0x210
  |   show_stack+0x1c/0x2c
  |   dump_stack+0xec/0x130
  |   __report_bad_irq+0x50/0x190
  |   note_interrupt+0x1e4/0x260
  |   handle_irq_event+0x144/0x17c
  |   handle_fasteoi_irq+0xd0/0x240
  |   __handle_domain_irq+0x80/0xf0
  |   gic_handle_irq+0x74/0x2d0
  |   el1_irq+0xbc/0x140
  |   mnt_clone_write+0x0/0x70
  |   file_update_time+0xcc/0x160
  |   fault_dirty_shared_page+0xe8/0x150
  |   do_shared_fault+0x80/0x1d0
  |   do_fault+0x118/0x1a4
  |   handle_pte_fault+0x154/0x230
  |   __handle_mm_fault+0x1ac/0x390
  |   handle_mm_fault+0xf0/0x250
  |   do_page_fault+0x184/0x454
  |   do_translation_fault+0xac/0xd4
  |   do_mem_abort+0x44/0xb4
  |   el0_da+0x40/0x74
  |   el0_sync_handler+0x60/0xb4
  |   el0_sync+0x168/0x180
  |  handlers:
  |   pcc_mbox_irq
  |  Disabling IRQ #13

To solve this issue, pcc_mbox_irq() must clear 'chan_in_use' flag before
the call to mbox_chan_received_data().

Tested-by: Adam Young <admiyo@os.amperecomputing.com>
Tested-by: Robbie King <robbiek@xsightlabs.com>
Signed-off-by: Huisong Li <lihuisong@huawei.com>
(sudeep.holla: Minor updates to the subject, commit message and comment)
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:25 -05:00
Tudor Ambarus
4de14ec76b mailbox: remove unused header files
There's nothing used from these header files, remove their inclusion.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:25 -05:00
Tudor Ambarus
824b7442ed mailbox: explicitly include <linux/bits.h>
Don't rely on those including the header file to already include the
needed <linux/bits.h>. Include it in the header file.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:25 -05:00
Tudor Ambarus
db824c1119 mailbox: sort headers alphabetically
Sorting headers alphabetically helps locating duplicates,
and makes it easier to figure out where to insert new headers.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:25 -05:00
Tudor Ambarus
8c71c61fc6 mailbox: don't protect of_parse_phandle_with_args with con_mutex
There are no concurrency problems if multiple consumers parse the
phandle, don't gratuiously protect the parsing with the mutex used
for the controllers list.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:25 -05:00
Tudor Ambarus
24fdd5074b mailbox: use error ret code of of_parse_phandle_with_args()
In case of error, of_parse_phandle_with_args() returns -EINVAL when the
passed index is negative, or -ENOENT when the index is for an empty
phandle. The mailbox core overwrote the error return code with a less
precise -ENODEV. Use the error returned code from
of_parse_phandle_with_args().

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:25 -05:00
Krzysztof Kozlowski
d3e2ea6497 mailbox: arm_mhuv2: Constify amba_id table
'struct amba_id' table is not modified so can be changed to const for
more safety.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:25 -05:00
Krzysztof Kozlowski
7566d5b670 mailbox: arm_mhu_db: Constify amba_id table
'struct amba_id' table is not modified so can be changed to const for
more safety.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:25 -05:00
Krzysztof Kozlowski
48e7375ec1 mailbox: arm_mhu: Constify amba_id table
'struct amba_id' table is not modified so can be changed to const for
more safety.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:25 -05:00
Krzysztof Kozlowski
5f3aee4711 mailbox: pl320-ipc: Constify amba_id table
'struct amba_id' table is not modified so can be changed to const for
more safety.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:24 -05:00
Krzysztof Kozlowski
12868a6c10 mailbox: pl320-ipc: Drop unused xxx_destination functions
set_destination() and clear_destination() are static functions not used
anywhere in the code:

  pl320-ipc.c:48:20: error: unused function 'set_destination' [-Werror,-Wunused-function]
  pl320-ipc.c:54:20: error: unused function 'clear_destination' [-Werror,-Wunused-function]

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:24 -05:00
Kartik Rajput
bf0c9fb462 mailbox: tegra-hsp: Define dimensioning masks in SoC data
Tegra264 has updated HSP_INT_DIMENSIONING register as follows:
	* nSI is now BIT17:BIT21.
	* nDB is now BIT12:BIT16.

Currently, we are using a static macro HSP_nINT_MASK to get the values
from HSP_INT_DIMENSIONING register. This results in wrong values for nSI
for HSP instances that supports 16 shared interrupts.

Define dimensioning masks in soc data and use them to parse nSI, nDB,
nAS, nSS & nSM values.

Fixes: 602dbbacc3 ("mailbox: tegra: add support for Tegra264")
Cc: stable@vger.kernel.org
Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:24 -05:00
Nam Cao
c158a29c5c mailbox: Switch to use hrtimer_setup()
hrtimer_setup() takes the callback function pointer as argument and
initializes the timer completely.

Replace hrtimer_init() and the open coded initialization of
hrtimer::function with the new setup mechanism.

Patch was created by using Coccinelle.

Signed-off-by: Nam Cao <namcao@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Zack Rusin <zack.rusin@broadcom.com>
Link: https://lore.kernel.org/all/b742f81b6acdaa604511834a06a8aac3e6e63ca3.1738746904.git.namcao@linutronix.de
2025-02-18 11:19:04 +01:00
Michal Wilczynski
db04986694 mailbox: th1520: Fix memory corruption due to incorrect array size
The functions th1520_mbox_suspend_noirq and th1520_mbox_resume_noirq are
intended to save and restore the interrupt mask registers in the MBOX
ICU0. However, the array used to store these registers was incorrectly
sized, leading to memory corruption when accessing all four registers.

This commit corrects the array size to accommodate all four interrupt
mask registers, preventing memory corruption during suspend and resume
operations.

Fixes: 5d4d263e1c ("mailbox: Introduce support for T-head TH1520 Mailbox driver")
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/all/a99e72be-8490-4960-ad26-cbfef6af238f@stanley.mountain/
Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-01-18 16:20:55 -06:00
Uros Bizjak
170a264d26 mailbox: zynqmp: Remove invalid __percpu annotation in zynqmp_ipi_probe()
struct zynqmp_ipi_pdata __percpu *pdata is not a per-cpu variable,
so it should not be annotated with __percpu annotation.

Remove invalid __percpu annotation to fix several

zynqmp-ipi-mailbox.c:920:15: warning: incorrect type in assignment (different address spaces)
zynqmp-ipi-mailbox.c:920:15:    expected struct zynqmp_ipi_pdata [noderef] __percpu *pdata
zynqmp-ipi-mailbox.c:920:15:    got void *
zynqmp-ipi-mailbox.c:927:56: warning: incorrect type in argument 3 (different address spaces)
zynqmp-ipi-mailbox.c:927:56:    expected unsigned int [usertype] *out_value
zynqmp-ipi-mailbox.c:927:56:    got unsigned int [noderef] __percpu *
...

and several

drivers/mailbox/zynqmp-ipi-mailbox.c:924:9: warning: dereference of noderef expression
...

sparse warnings.

There were no changes in the resulting object file.

Cc: stable@vger.kernel.org
Fixes: 6ffb163534 ("mailbox: zynqmp: handle SGI for shared IPI")
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tanmay Shah <tanmay.shah@amd.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-01-18 16:20:21 -06:00
Tudor Ambarus
fbf7e5ce40 mailbox: add Samsung Exynos driver
The Samsung Exynos mailbox controller, used on Google GS101 SoC, has 16
flag bits for hardware interrupt generation and a shared register for
passing mailbox messages. When the controller is used by the
ACPM interface the shared register is ignored and the mailbox controller
acts as a doorbell. The controller just raises the interrupt to APM
after the ACPM interface has written the message to SRAM.

Add support for the Samsung Exynos mailbox controller.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-01-18 16:18:48 -06:00
Gokul Sriram Palanisamy
443a5cae7e mailbox: qcom: Add support for IPQ5424 APCS IPC
IPQ5424 mailbox do not have clock support and reuses msm8994_apcs_data.

Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-01-18 16:17:21 -06:00
Mukesh Ojha
16274d7e51 mailbox: qcom-ipcc: Reset CLEAR_ON_RECV_RD if set from boot firmware
For some SoCs, boot firmware is using the same IPCC instance used
by Linux and it has kept CLEAR_ON_RECV_RD set which basically means
interrupt pending registers are cleared when RECV_ID is read and the
register automatically updates to the next pending interrupt/client
status based on priority.

Clear the CLEAR_ON_RECV_RD if it is set from the boot firmware.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-01-18 16:15:33 -06:00
Valentina Fernandez
e4b1d67e71 mailbox: add Microchip IPC support
Add a mailbox controller driver for the Microchip Inter-processor
Communication (IPC), which is used to send and receive data between
processors.

The driver uses the RISC-V Supervisor Binary Interface (SBI) to
communicate with software running in machine mode (M-mode) to access
the IPC hardware block.

Additional details on the Microchip vendor extension and the IPC
function IDs described in the driver can be found in the following
documentation:

https://github.com/linux4microchip/microchip-sbi-ecall-extension

This SBI interface in this driver is compatible with the Mi-V Inter-hart
Communication (IHC) IP.

Transmitting and receiving data through the mailbox framework is done
through struct mchp_ipc_msg.

Signed-off-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-01-18 16:09:48 -06:00
Pekka Pessi
0b7f8328f9 mailbox: tegra-hsp: Clear mailbox before using message
The Tegra RCE (Camera) driver expects the mailbox to be empty before
processing the IVC messages. On RT kernel, the threads processing the
IVC messages (which are invoked after `mbox_chan_received_data()` is
called) may be on a different CPU or running with a higher priority
than the HSP interrupt handler thread. This can cause it to act on the
message before the mailbox gets cleared in the HSP interrupt handler
resulting in a loss of IVC notification.

Fix this by clearing the mailbox data register before calling
`mbox_chan_received_data()`.

Fixes: 8f585d1403 ("mailbox: tegra-hsp: Add tegra_hsp_sm_ops")
Fixes: 74c20dd0f8 ("mailbox: tegra-hsp: Add 128-bit shared mailbox support")
Cc: stable@vger.kernel.org
Signed-off-by: Pekka Pessi <ppessi@nvidia.com>
Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-01-18 16:05:34 -06:00
Dan Carpenter
f055feb49c mailbox: mpfs: fix copy and paste bug in probe
This code accidentally checks ->ctrl_base instead of ->mbox_base so the
error handling can never be triggered.

Fixes: a4123ffab9 ("mailbox: mpfs: support new, syscon based, devicetree configuration")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-01-18 16:04:51 -06:00
Dan Carpenter
d0f98e14c0 mailbox: th1520: Fix a NULL vs IS_ERR() bug
The devm_ioremap() function doesn't return error pointers, it returns
NULL.  Update the error checking to match.

Fixes: 5d4d263e1c ("mailbox: Introduce support for T-head TH1520 Mailbox driver")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Michal Wilczynski <m.wilczynski@samsung.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-01-18 16:04:04 -06:00
Linus Torvalds
d8b78066f4 TTY / Serial driver updates for 6.13-rc1
Here is a small set of tty and serial driver updates for 6.13-rc1.
 Nothing major at all this time, only some small changes:
   - few device tree binding updates
   - 8250_exar serial driver updates
   - imx serial driver updates
   - sprd_serial driver updates
   - other tiny serial driver updates, full details in the shortlog
 
 All of these have been in linux-next for a while with one reported
 issue, but that commit has now been reverted.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'tty-6.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull tty / serial driver updates from Greg KH:
 "Here is a small set of tty and serial driver updates for 6.13-rc1.
  Nothing major at all this time, only some small changes:

   - few device tree binding updates

   - 8250_exar serial driver updates

   - imx serial driver updates

   - sprd_serial driver updates

   - other tiny serial driver updates, full details in the shortlog

  All of these have been in linux-next for a while with one reported
  issue, but that commit has now been reverted"

* tag 'tty-6.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (37 commits)
  Revert "serial: sh-sci: Clean sci_ports[0] after at earlycon exit"
  serial: amba-pl011: fix build regression
  dt-bindings: serial: Add a new compatible string for ums9632
  serial: sprd: Add support for sc9632
  tty/serial/altera_uart: unwrap error log string
  tty/serial/altera_jtaguart: unwrap error log string
  serial: amba-pl011: Fix RX stall when DMA is used
  tty: ldsic: fix tty_ldisc_autoload sysctl's proc_handler
  serial: 8250_fintek: Add support for F81216E
  serial: sh-sci: Clean sci_ports[0] after at earlycon exit
  tty: atmel_serial: Fix typo retreives to retrieves
  tty: atmel_serial: Use devm_platform_ioremap_resource()
  serial: 8250: omap: Move pm_runtime_get_sync
  tty: serial: samsung: Add Exynos8895 compatible
  dt-bindings: serial: samsung: Add samsung,exynos8895-uart compatible
  serial: 8250_dw: Add Sophgo SG2044 quirk
  dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2044 uarts
  dt-bindings: serial: snps,dw-apb-uart: merge duplicate compatible entry.
  altera_jtaguart: Use dev_err() to report error attaching IRQ
  altera_uart: Use dev_err() to report error attaching IRQ handler
  ...
2024-11-30 09:03:16 -08:00
Adam Young
7f9e19f207 mailbox: pcc: Check before sending MCTP PCC response ACK
Type 4 PCC channels have an option to send back a response
to the platform when they are done processing the request.
The flag to indicate whether or not to respond is inside
the message body, and thus is not available to the pcc
mailbox.

If the flag is not set, still set command completion
bit after processing message.

In order to read the flag, this patch maps the shared
buffer to virtual memory. To avoid duplication of mapping
the shared buffer is then made available to be used by
the driver that uses the mailbox.

Signed-off-by: Adam Young <admiyo@os.amperecomputing.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2024-11-24 13:20:40 -06:00
Uwe Kleine-König
81f939db2a mailbox: Switch back to struct platform_driver::remove()
After commit 0edb555a65 ("platform: Make platform_driver::remove()
return void") .remove() is (again) the right callback to implement for
platform drivers.

Convert all platform drivers below drivers/mailbox to use .remove(),
with the eventual goal to drop struct platform_driver::remove_new(). As
.remove() and .remove_new() have the same prototypes, conversion is done
by just changing the structure member name in the driver initializer.

Make a few indentions consistent while touching these struct
initializers.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2024-11-24 13:11:01 -06:00
zhang jiao
e52673554c mailbox: imx: Modify the incorrect format specifier
Replace %i with %u in snprintf() because it is "unsigned int".

Signed-off-by: zhang jiao <zhangjiao2@cmss.chinamobile.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2024-11-24 13:09:40 -06:00