- PCIe endpoint support for the RZ/G2H SoC,
- SATA support for the HopeRun HiHope RZ/G2H board,
- Increase support (CAN, LED, SPI NOR, VIN, VSP) for the RZ/G1H SoC on
the iWave Qseven board (G21D), and its camera add-on board,
- Initial support for the R-Car V3U SoC on the Falcon CPU and BreakOut
boards,
- HDMI display and sound support for the R-Car M3-W+ SoC on the
Salvator-XS board,
- Digital Radio Interface (DRIF) support for the R-Car E3 SoC,
- Minor fixes and cleanups.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCX2SkmQAKCRCKwlD9ZEnx
cIXNAP0XqvKJP7xGjQ1ORyePB1nWZtebVqGoQFxpvqwznMNZlAD7BIRlATo4LYpu
LNMya5sk85WAhZNbpkHwR++3/8m+mgE=
=Va2A
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt-for-v5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.10 (take two)
- PCIe endpoint support for the RZ/G2H SoC,
- SATA support for the HopeRun HiHope RZ/G2H board,
- Increase support (CAN, LED, SPI NOR, VIN, VSP) for the RZ/G1H SoC on
the iWave Qseven board (G21D), and its camera add-on board,
- Initial support for the R-Car V3U SoC on the Falcon CPU and BreakOut
boards,
- HDMI display and sound support for the R-Car M3-W+ SoC on the
Salvator-XS board,
- Digital Radio Interface (DRIF) support for the R-Car E3 SoC,
- Minor fixes and cleanups.
* tag 'renesas-arm-dt-for-v5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (24 commits)
arm64: dts: renesas: r8a774c0: Fix MSIOF1 DMA channels
arm64: dts: renesas: r8a77990: Fix MSIOF1 DMA channels
arm64: dts: renesas: r8a77990: Add DRIF support
ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add can0 support to camera DB
ARM: dts: r8a7742: Add VSP support
arm64: dts: renesas: Drop superfluous pin configuration containers
arm64: dts: renesas: r8a77961: salvator-xs: Add HDMI Sound support
arm64: dts: renesas: r8a77961: salvator-xs: Add HDMI Display support
arm64: dts: renesas: r8a77961: Add HDMI device nodes
arm64: dts: renesas: r8a77961: Add DU device nodes
arm64: dts: renesas: r8a77961: Add VSP device nodes
arm64: dts: renesas: r8a77961: Add FCP device nodes
arm64: dts: renesas: Fix pin controller node names
ARM: dts: renesas: Fix pin controller node names
arm64: dts: renesas: Add Renesas Falcon boards support
arm64: dts: renesas: Add Renesas R8A779A0 SoC support
ARM: dts: r8a7742-iwg21d-q7: Enable SD2 LED indication
ARM: dts: r8a7742-iwg21d-q7: Add can1 support to carrier board
ARM: dts: r8a7742-iwg21d-q7: Add SPI NOR support
ARM: dts: r8a7742: Add VIN DT nodes
...
Link: https://lore.kernel.org/r/20200918124800.15555-2-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
The Synopsys DesignWare APB GPIO controller driver does not parse
reg-io-width and dtschema does not allow it so drop it to fix dtschema
warnings like:
arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dt.yaml: gpio@20000:
'reg-io-width' does not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', 'pinctrl-[0-9]+'
Link: https://lore.kernel.org/r/20200917164909.22490-1-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add the s6e63m0 display to the Golden device
- Add the KTD253 backlight to the Skomer device
- Update the LP5521 LED DTS entries for binding changes
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl9h/zEACgkQQRCzN7AZ
XXNUlw//Zl3PjaGA2Uer0Wn1JGNJmtNmnMP1c8+bWh6kYqop4L1tn7kUmq6Wgc7i
GlFrmX4NwsRRYA5CnYNsqUGYRXqjSHrjssUdHMllLcQPijvLE/POa/0rLwrVZjuZ
4R73Bn3qyIi1LiJKx8KEnMfYeIpizv5WNGWukumyNQueg7Uzj1iayvnOQUHjxk4G
PbNo5IbKLmU5XbVVzy06vfzPw5DwoPYB8L8PwAP5MrxDTH6FJ5ClleA14MovaDpI
eYd2RzPkOG2QfLVPOgC/j6JaVR+p5q7SyKqmTGNgPz0pcA1FSCJNpxS5/8OlhTdm
7G6U743jIQHMu09OVKKKjja7DMAVefgVp+/V4/dJplI2njyxLZtRb7MCfW4FFOzY
mJpJ/oI6yrWSeEjNkCoYgSbmdQDLokLPqMYIeARDviY8YjbUHOV/+oOrw8V0Toyz
2+bj5e6hoojCvKmjHvTH0cG6ATntVLPx8jGfVRRB4x87S46jC/zWfprsJGIvNKTh
BGo4urhNVN6bt1kxMKOtowME3nzOQk4wFLxi1bEc4mrCr3oRHRkHOmg0FANq0lVP
Il1lAWJ4BOLOxLhdEpT29MtU8hIFglzB/e9WGlXQFX1pRaqgDm+uroxBpaCft88X
v/38mzNkIVM2119KSvCIdPJKhGCUqrdtdV78anVaZUZstKVDIII=
=jwb5
-----END PGP SIGNATURE-----
Merge tag 'ux500-dts-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt
Ux500 DTS updates for the v5.10 kernel cycle:
- Add the s6e63m0 display to the Golden device
- Add the KTD253 backlight to the Skomer device
- Update the LP5521 LED DTS entries for binding changes
* tag 'ux500-dts-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: dts: ste-href: Add reg property to the LP5521 channel nodes
ARM: dts: ux500-skomer: Add KTD253 backlight
ARM: dts: ux500-golden: Add S6E63M0 DSI display
Link: https://lore.kernel.org/r/CACRpkda=-cgFjN7K2vBU5x4uSYrohrZSbjqMnSFb3Qe2Az1W5g@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
- Update the SP804 nodes to have the correct clocks and
clock names for the hi3620 SoC
- Update the SP805 nodes to have the correct clocks and
clock names for the hix5hd2 SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJfYWhGAAoJEAvIV27ZiWZc1uwP/3gqVG7MQGWQfYde6wA/2xYw
LLBF981m2893EXPO2R7VppBVdpXEe6no3hxqn5IQzhKKD2jGUABn9LuJv8mcsoV9
+jsU7N6DtVKjdEQC5N8WokL032gccOwRWuCjYea39bt8bAZdLWO4LAqoacdgT78c
Oh/QrtveSCdlEHN5/jzeedWGCumDR0c0KCOtx+0Uma9NHlxAu9xH6DRalfpU1tOf
GOUzd4GzMa8dBYRXfuXxYTJJ92ivaGNPv6Q0ohIh2tnET7Ew7j5AaIvh1MDzj2NW
8j/XIZTxN9El4MnLXuEnGNEm/MRNNSvz+XtgjGCA0/zy5BHlGWXDEe/Hi1BJPXev
6faCMesvpe2Du5yKcWXhfZdiQaVmNQ2odtzQZhtDSHsxv0hXRt/XySM8LswoCVXT
aTduBOc57KKG4bNIrNkN2wCtkG1Lht0c0eo+ihSUKx8MHDHfjqh6kiaukJACx/yX
C6qdgEMyzQBvxW0Ii8lhBnP/CeVUTQPEx5m2cruitQ0mx+eDESw4rSR2jJZwG6hB
Njmf6w1ilYI3naiQVzFIl8YOKxbUI9mtGXIbtwKe0ux3kBctvq5d9d/J/KF7ceSS
fYyB8aDCPFS6BUQjWX9SOE8V/HkFiheR3UTqBS+WkNzLJ3SBF5Spzhbp3e3QD04F
ZZFX3iXZAMQZoR0Kism6
=WbPu
-----END PGP SIGNATURE-----
Merge tag 'hisi-arm32-dt-for-5.10' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM: DT: Hisilicon ARM32 SoCs DT updates for 5.10
- Update the SP804 nodes to have the correct clocks and
clock names for the hi3620 SoC
- Update the SP805 nodes to have the correct clocks and
clock names for the hix5hd2 SoC
* tag 'hisi-arm32-dt-for-5.10' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hisilicon: Fix SP805 clocks
ARM: dts: hisilicon: Fix SP804 users
Link: https://lore.kernel.org/r/5F617209.90003@hisilicon.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Correct the property for reset GPIOs of the GPIO expander.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The convention for node names is to use hyphens, not underscores.
dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The PCA9539 GPIO expander requires GPIO controller properties to operate
properly.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
All am437x boards have been converted to use new driver, so drop legacy
cpsw dt node.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The dual_mac mode has been preserved the same way between legacy and new
driver, and one port devices works the same as 1 dual_mac port - it's safe
to switch drivers.
So, Switch all am437x boards to use new cpsw switch driver. Those boards
have or 2 Ext. port wired and configured in dual_mac mode by default, or
only 1 Ext. port.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add DT node for the new cpsw switchdev based driver.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As per the iWave RZ/G1M schematic, the signal LVDS_PPEN controls the
supply voltage for the touch panel, LVDS receiver and RGB LCD panel. Add
a regulator for these device nodes and remove the powerdown-gpios
property from the lvds-receiver node as it results in a touch controller
driver probe failure.
Fixes: 6f89dd9e93 ("ARM: dts: iwg20d-q7-common: Add LCD support")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200924080535.3641-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This patch adds FMC2 External Bus Interface support on stm32mp157c.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The "eMMC high-speed DDR mode (3.3V I/O)" at 50MHz is supported on
the eMMC-interface of the lxa-mc1. Set it in the device tree to
benefit from the speed improvement.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Holger Assmann <h.assmann@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The display PWM channel is number 3 (PWM2 CH4), make it so.
Fixes: 34e0c7847d ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The DH AV96 has RTS/CTS lines available on UART7, describe them in DT.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
On the production revision of the SoM, 587-200, the PHY reset GPIO and
touchscreen IRQs are swapped to prevent collision between EXTi IRQs,
reflect that in DT.
Fixes: 34e0c7847d ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Previously the FIFO on the stm32h743 usart was not utilized, because
the stm32f7 compatible configures it without FIFO support.
Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The stm32 spi driver tries to determine the fifo size of spi devices
dynamically. However, if the spi was already configured by the bootloader
the fifo size check can become an endless loop, because the driver
expects the spi to be in its initial "after device reset" state. The
driver does already support resetting the spi device at probe, thus this
patch adds only the required device tree properties
Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The DH PDK2 has RTS/CTS lines available on UART8, describe them in DT.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The QSPI CS2 is not used on DHCOM, remove the pinmux settings.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add support for Seeed Studio's stm32mp157c odyssey board.
Board consists of SoM with stm32mp157c with 4GB eMMC and 512 MB DDR3 RAM
and carrier board with USB and ETH interfaces, SD card connector,
wifi and BT chip AP6236.
In this patch only basic kernel boot is supported and interfacing
SD card and on-board eMMC.
Signed-off-by: Marcin Sloniewski <marcin.sloniewski@gmail.com>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The KSZ9031 PHY skew timings for rxc/txc, originally set to achieve
the desired phase shift between clock- and data-signal, now trigger a
kernel warning when used in rgmii-id mode:
*-skew-ps values should be used only with phy-mode = "rgmii"
This is because commit bcf3440c6d ("net: phy: micrel: add phy-mode
support for the KSZ9031 PHY") now configures own timings when
phy-mode = "rgmii-id". Device trees wanting to set their own delays
should use phy-mode "rgmii" instead as the warning prescribes.
The "standard" timings now used with "rgmii-id" work fine on this
board, so drop the explicit timings in the device tree and thereby
silence the warning.
Fixes: 666b5ca85c ("ARM: dts: stm32: add STM32MP1-based Linux Automation MC-1 board")
Signed-off-by: Holger Assmann <h.assmann@pengutronix.de>
Acked-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The DH PDK2 board is capable of USB OTG on the X14 USB Mini-AB connector,
fill in the missing bits to make USB OTG possible instead of peripheral.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The AV96 uses sdmmc2_d47_pins_c and sdmmc2_d47_sleep_pins_c, which
differ from sdmmc2_d47_pins_b and sdmmc2_d47_sleep_pins_b in one
pin, SDMMC2_D5, which is PA15 in the former and PA9 in the later.
The PA15 is correct on AV96, so fix this. This error is likely a
result of rebasing across the stm32mp1 DT pinctrl rework.
Fixes: 611325f681 ("ARM: dts: stm32: Add eMMC attached to SDMMC2 on AV96")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add DT for DH DRC02 unit, which is a universal controller device.
The system has two ethernet ports, two CANs, RS485 and RS232, USB,
capacitive buttons and an OLED display.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The PHY and the VIO regulator is populated on the SoM, move it
into the SoM DT.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Pull networking fixes from Jakub Kicinski:
- fix failure to add bond interfaces to a bridge, the offload-handling
code was too defensive there and recent refactoring unearthed that.
Users complained (Ido)
- fix unnecessarily reflecting ECN bits within TOS values / QoS marking
in TCP ACK and reset packets (Wei)
- fix a deadlock with bpf iterator. Hopefully we're in the clear on
this front now... (Yonghong)
- BPF fix for clobbering r2 in bpf_gen_ld_abs (Daniel)
- fix AQL on mt76 devices with FW rate control and add a couple of AQL
issues in mac80211 code (Felix)
- fix authentication issue with mwifiex (Maximilian)
- WiFi connectivity fix: revert IGTK support in ti/wlcore (Mauro)
- fix exception handling for multipath routes via same device (David
Ahern)
- revert back to a BH spin lock flavor for nsid_lock: there are paths
which do require the BH context protection (Taehee)
- fix interrupt / queue / NAPI handling in the lantiq driver (Hauke)
- fix ife module load deadlock (Cong)
- make an adjustment to netlink reply message type for code added in
this release (the sole change touching uAPI here) (Michal)
- a number of fixes for small NXP and Microchip switches (Vladimir)
[ Pull request acked by David: "you can expect more of this in the
future as I try to delegate more things to Jakub" ]
* git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (167 commits)
net: mscc: ocelot: fix some key offsets for IP4_TCP_UDP VCAP IS2 entries
net: dsa: seville: fix some key offsets for IP4_TCP_UDP VCAP IS2 entries
net: dsa: felix: fix some key offsets for IP4_TCP_UDP VCAP IS2 entries
inet_diag: validate INET_DIAG_REQ_PROTOCOL attribute
net: bridge: br_vlan_get_pvid_rcu() should dereference the VLAN group under RCU
net: Update MAINTAINERS for MediaTek switch driver
net/mlx5e: mlx5e_fec_in_caps() returns a boolean
net/mlx5e: kTLS, Avoid kzalloc(GFP_KERNEL) under spinlock
net/mlx5e: kTLS, Fix leak on resync error flow
net/mlx5e: kTLS, Add missing dma_unmap in RX resync
net/mlx5e: kTLS, Fix napi sync and possible use-after-free
net/mlx5e: TLS, Do not expose FPGA TLS counter if not supported
net/mlx5e: Fix using wrong stats_grps in mlx5e_update_ndo_stats()
net/mlx5e: Fix multicast counter not up-to-date in "ip -s"
net/mlx5e: Fix endianness when calculating pedit mask first bit
net/mlx5e: Enable adding peer miss rules only if merged eswitch is supported
net/mlx5e: CT: Fix freeing ct_label mapping
net/mlx5e: Fix memory leak of tunnel info when rule under multipath not ready
net/mlx5e: Use synchronize_rcu to sync with NAPI
net/mlx5e: Use RCU to protect rq->xdp_prog
...
Add a Device Tree for the RoseapplePi SBC.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Peter Korsgaard <peter@korsgaard.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Add Device Trees for Caninos Loucos Labrador CoM Core v2 and base board
M v1. Based on the work of Andreas Färber on Lemaker Guitar device tree.
Signed-off-by: Matheus Castello <matheus@castello.eng.br>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags.
These are simple defines so they could be used in DTS but they will not
have the same meaning:
1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE
2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING
Correct the interrupt flags, assuming the author of the code wanted same
logical behavior behind the name "ACTIVE_xxx", this is:
ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Using the native SPI chipselect on i.MX6 is known to be problematic.
Doing it on a imx6q-sabresd causes the SPI NOR probe to fail:
[ 5.388704] spi-nor spi0.0: unrecognized JEDEC id bytes: 00 00 00 00 00 00
Use the GPIO chipselect to avoid such problem.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add an entry for imx6q-logicpd.dtb so that it can be built by default.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It is standard practice to have a specific board compatible string, so
pass "logicpd,imx6q-logicpd".
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix. While
touching the hogs, fix indentation (spaces -> tabs).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
port6 of mt7530 switch (= cpu port 0) on bananapi-r2 misses pause option
which causes rx drops on running iperf.
Fixes: f4ff257cd1 ("arm: dts: mt7623: add support for Bananapi R2 (BPI-R2) board")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200907070517.51715-1-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The sun8i-codec driver introduced a new set of DAPM widgets that more
accurately describe the hardware topology. Update the various device
trees to use the new widget names.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200726012557.38282-6-samuel@sholland.org
SMB347 is a battery charger controller which is found on the Nexus 7
device.
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The default parent for all MMCs is PLLP, which is running at 408 MHz on
Tegra30 and 50 MHz clock can't be derived from PLLP. The maximum SDIO
clock rate is 50 MHz, but this rate isn't achievable using PLLP.
Let's switch the WiFi MMC clock parent to PLLC in order to get true 50
MHz. This patch doesn't fix any problems, it's just a minor improvement.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The default parent for all MMCs is PLLP, which is running at 216 MHz on
Tegra20 and 50 MHz clock can't be derived from PLLP. The maximum SDIO
clock rate is 50 MHz, but this rate isn't achievable using PLLP.
Let's switch the WiFi MMC clock parent to PLLC in order to get true 50
MHz. This patch doesn't fix any problems, it's just a minor improvement.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Previously 50MHz clock rate didn't work because of the wrong PINCTRL
configuration used for SDIO pins. Now the PINCTRL config is corrected
and the MMC clock rate could be bumped safely to 50MHz, increasing WiFi
TX throughput by 20 Mbit/s and allowing to hit the maximum 40 Mbit/s.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The low-power-mode drive was set to DIV_4 for some of PINCTRL groups,
while these groups should use DIV_1. This patch fixes the wrong PINCTRL
configurations and adds a full drive-setup for the changed configs, just
for completeness since the added values match the default configuration.
Now WiFi SDIO communication works properly using legacy signaling mode if
SDIO BUS clocked at 50MHz, which is a maximum SDIO clock rate on Tegra20.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This property was supposed to be upstreamed, but it was NAKed recently
in a favor to a better approach of firmware loading. It also turned
out that the firmware loading isn't really necessary because it's stored
in a non-volatile memory inside of the touchscreen controller and
previously the FW loading was needed in order to get touchscreen working,
but it actually was a TS driver problem which is resolved now. Hence
remove the unsupported property.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
MMC core now supports binding to a specific ID, which is very handy for
embedded devices, like Acer A500, because MMC ID may change depending on
kernel version or configuration which affects MMC driver probe order.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
MMC core now supports binding to a specific ID, which is very handy for
embedded devices, like Nexus 7, because MMC ID may change depending on
kernel version or configuration which affects MMC driver probe order.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
"gpios" property is deprecated. Update the Goni DTS to fix
dtbs_checks warnings like:
i2c-pmic: 'sda-gpios' is a required property
i2c-pmic: 'scl-gpios' is a required property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-24-krzk@kernel.org
"gpios" property is deprecated. Update the Aquila DTS to fix
dtbs_checks warnings like:
i2c-pmic: 'sda-gpios' is a required property
i2c-pmic: 'scl-gpios' is a required property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-23-krzk@kernel.org
The fixed regulators are kept under dedicated "regulators" node but this
causes multiple dtschema warnings:
regulators: $nodename:0: 'regulators' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
regulators: #size-cells:0:0: 0 is not one of [1, 2]
regulators: fixed-regulator@0:reg:0: [0] is too short
regulators: fixed-regulator@1:reg:0: [1] is too short
regulators: fixed-regulator@2:reg:0: [2] is too short
regulators: fixed-regulator@3:reg:0: [3] is too short
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-22-krzk@kernel.org
The fixed regulators are kept under dedicated "regulators" node but this
causes multiple dtschema warnings:
regulators: $nodename:0: 'regulators' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
regulators: #size-cells:0:0: 0 is not one of [1, 2]
regulators: fixed-regulator@0:reg:0: [0] is too short
regulators: fixed-regulator@1:reg:0: [1] is too short
regulators: fixed-regulator@2:reg:0: [2] is too short
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-21-krzk@kernel.org
Having the pinctrl-names property in the dtsi leads to dtbs_check warnings
when the board dts doesn't define pinctrl-0. Instead, move the property to
the board dts actually using the mmc node.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20200831171129.3886857-5-alexandre.belloni@bootlin.com
We can now pass multiple versions in "opp-supported-hw" property, lets
do that and simplify the tables a bit.
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
This patch enables CAN0 interface exposed through connector J4 on the
camera DB.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200911083615.17377-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.
Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The SP804 binding only specifies one or three clocks, but does not allow
just two clocks.
The HiSi 3620 .dtsi specified two clocks for the two timers, plus gave
one "apb_pclk" clock-name to appease the primecell bus driver.
Extend the clocks by duplicating the first clock to the end of the clock
list, and add two dummy clock-names to make the primecell driver happy.
I don't know what the real APB clock for the IP is, but with the current
DT the first timer clock was used for that, so this change keeps the
current status.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
please pull the following:
- Christian adds support for the Cisco Meraki MR32 which is based on the
BCM53016 SoC, this requires specifying the PWM, second UART and third
PCIe controller in Device Tree before finally adding support for the
board.
- Adrian updates the status properties from "ok" to "okay".
- Andre fixes the SP805 watchdog nodes to have the correct clock names
and binding for both the Cygnus and Northstar Plus (NSP). He does the
same thing with the SP804 timer node which was missing an
"arm,primecell" compatible string.
- Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all
DRM changes are ready.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl9b6asACgkQh9CWnEQH
BwRg8A//d/jxSv6PFEwZzKbzmRCw38e4hUxROUWGVLdELAkF6jywmDDVIFbOKZvH
m4bUDsUUZrXk8YnyiR2dvlwt+Qy55UgxIZEB0On8kNK+1aCHsThnVXzbK9gRsrMb
dS89BcuMK0msMVeqU/hZ01efd0O1C0Oe0UPiRvDZ6q4s/qH5RIUK/8Hx3hJGtXUY
2dMcfRLyqN8a1qqpGm5CbYJROD4L8rkg/AaaHAq71iz5uMR3r/PyCCEeT+UIV7yT
TFMsdUe//SyHPYYrbYAIqRW8mEzMEFEGvv2zlG42EroGxapPP4+fe5vGlnPGQwXk
lBLAEaZ3xTZ4p6G6s8YNWS06FM/ARRM5wsp/ZWlU5NNg/UCCUTqVOdH7Sr6fsJbV
NysQYrPf9vYfcANWmHQTZcQRHCWG9hkIoOfYbdI834z5MBMN2W2JCtOiG/fawSwM
Ir1lQpKYhQmIkp6dShB0B52EufgFdrL50N92vOBczlJWWOjcxfA6hGKKF/SxhBia
r3gMPYN3sjPAtA2Q36FiP+LOr32K9wzQZSIklSVUlcdzr15VHG/f/mKP1erWwTVS
+dVdQg9Jzm0KsPWMJ4suJocDuerZPH8BZoK6T2C9lmLD7RocKvR4keEEvVI1tdOn
DWXQ3TaJW9QM+QzavU/F4HOhK4bYyiYGIGlyhKZm32vC/jM+bw0=
=EBR/
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs changes for 5.10,
please pull the following:
- Christian adds support for the Cisco Meraki MR32 which is based on the
BCM53016 SoC, this requires specifying the PWM, second UART and third
PCIe controller in Device Tree before finally adding support for the
board.
- Adrian updates the status properties from "ok" to "okay".
- Andre fixes the SP805 watchdog nodes to have the correct clock names
and binding for both the Cygnus and Northstar Plus (NSP). He does the
same thing with the SP804 timer node which was missing an
"arm,primecell" compatible string.
- Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all
DRM changes are ready.
* tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: broadcom: Fix SP804 node
ARM: dts: NSP: Fix SP805 clock-names
ARM: dts: Cygnus: Fix SP805 clocks
ARM: dts: NSP: replace status value "ok" by "okay"
ARM: BCM5301X: Add DT for Meraki MR32
ARM: dts: bcm2711: Enable the display pipeline
ARM: dts: BCM5301X: Specify pcie2 in the DT
ARM: dts: BCM5301X: Specify uart2 in the DT
ARM: dts: BCM5301X: Specify PWM in the DT
dt-bindings: ARM: add bindings for the Meraki MR32
Link: https://lore.kernel.org/r/20200912032153.1216354-1-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
- New machines
* Wistron Mowgli, an AST2500 BMC for a Power9 OpenPower server
* Facebook Wedge400, an AST2500 BMC system which we can assume is 4
times better than the existing Wedge100 top of rack network switch
- Add a new device, the IBM Operation Panel
- Fixes for Facebook's collection of BMCs
- eMMC and vuart fixes
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAl9bD9MACgkQa3ZZB4FH
cJ7KJA/+N7Vqo5WtSZjGOXtB+qHBH/Wv4rdmlV363FN7uqm7M22wuMUYMltam4ge
x8m4xGslkWn5ckOC6kqQSPRRy65U++I27RxrEDuykrPpLv0IzuVmmhonZbcZnTeF
q4KIWDzcITjzJsHqsn/en/50KiAaErgnikTvmaX3T/GdGTplUX+X7XODDEtJLrac
mY8d98J3wHcg/YA4D6aQ5gLmiRlx7Zm8v1NYkHcIwc0AydV8g8wnR67bwZBwVROW
aT8a9JCfADKKuZJMwDgU/WC6ZelBAZhwKAMBtzBKxYeSMYt/m1i43keW0aqpsWgc
hnqEPYj0tlt4pGgFQLfXu3WPFdKhGGx5KkeJWwBtMrudY9DAc7tis9VopqM4/2d/
vhPjaVD1qIyBP4ekL29RKD2gVSOmq3kEIuXnUcr2GQiUTkr5AY02oUIMSBfh/S8Z
pzBCwfV4g/Na4ohFBhrqTw8HnnSt65LHTFUeT8+twGoot3Ugl5b+5ooM/UnschaG
Ute7GgCvRcaarrFnDYY0O3qBdFd3TPc/Fvh54J1+n7pETabcVO2Qc9lNlN1HbtYv
0agccoKoCMEt36Buhjx+Hmwh3UH8g1mQo/D2NHJp4Eh9pYHDuOZCpY1DINQdlQQP
WiRv3mwAbe6n5hceE3dlLWqLA0akKJ+lQBZo+v9frpSKZadO8mg=
=C32V
-----END PGP SIGNATURE-----
Merge tag 'aspeed-5.10-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt
ASPEED device tree updates for 5.10
- New machines
* Wistron Mowgli, an AST2500 BMC for a Power9 OpenPower server
* Facebook Wedge400, an AST2500 BMC system which we can assume is 4
times better than the existing Wedge100 top of rack network switch
- Add a new device, the IBM Operation Panel
- Fixes for Facebook's collection of BMCs
- eMMC and vuart fixes
* tag 'aspeed-5.10-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: Add Mowgli BMC platform
ARM: dts: rainier: Disable internal pull-downs on eMMC pins
ARM: aspeed: g5: Do not set sirq polarity
ARM: dts: aspeed: rainier: Add IBM Operation Panel I2C device
ARM: dts: aspeed: tacoma: Add IBM Operation Panel I2C device
ARM: dts: aspeed: rainier: Enable XDMA engine
ARM: dts: aspeed: wedge40: Update UART4 pin settings
ARM: dts: aspeed: wedge40: Update FMC flash0 label
ARM: dts: aspeed: Add Facebook Wedge400 BMC
ARM: dts: aspeed: minipack: Update 64MB FMC flash layout
ARM: dts: aspeed: yamp: Set 32MB FMC flash layout
ARM: dts: aspeed: cmm: Set 32MB FMC flash layout
ARM: dts: aspeed: Remove flash layout from Facebook AST2500 Common dtsi
Link: https://lore.kernel.org/r/CACPK8XcDNBYAHzW6NYB4LFm3YbN63AprgW75ZqS+6uXn2b3kug@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
A few device tree source fixes to make them fully SP804 timer and
SP805 watchdog binding compliant.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAl9XhykACgkQAEG6vDF+
4pjOBQ/+J658DPN6oca2KfhBWrtbTf2tqHcxbrcOJOHrBgZ+ssF1RsQbaw0iEzKE
L3gKVVofafpInTjimImNg3BiLV2vqu4WEVzHBV0sF7TfnSD+b6g5FOHLq4Im45WY
lphR/dup/bmzD8jxEGbg//589DCMBQNTCfJ9+0FT5q9fBF7EimMXF3xZKPYcRly/
f+/dqK9M4zTNOqKNEzUrX8ceevAHJUtSgZIBcZ5gFKkDUTiCOo8lrN3mv3KP1EIz
xRJbcVr19vYRBfECUp4gM2XVWbTdLGb5tEcMYWZzfLZnHHuQEBa5XsYGeJXGOeny
0bgoG+D8AvgJmFJQodRy+pAFAvzVvJwcalRN0hL/kvOxCMOt3L0oL7jiCZSTUd69
P3cDwOi+5eVReJWF0vQA7uyvOqbYwJKd4FkQqS4MF350Fx0xcogRVIHkNjTE2tKw
JgA9E30vuIbgdo/0wjsToWXrTi2mUHKUB0HsDzTUCmG3/pjfpLmcsXPmEia4Js2l
aW/u9CcCJ4Wvi35X2Sccqj5TmXi5DAQ2bCQD8pPUq58akY9tlKzRChvXFz8/jETG
PMIdQLxbFhiuoqoOM9VKWmZR2pGq4qfXeK0d5oTAIfHwBx/EOaqjfT0lGCahpQn6
QhgCrWWgHMnXA2W/cnXKaNYstW/8RA/yDuYPDYAO6yu6brP8rA8=
=93Pt
-----END PGP SIGNATURE-----
Merge tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt
ARMv8 Juno/Vexpress/Fast Models updates for v5.10
A few device tree source fixes to make them fully SP804 timer and
SP805 watchdog binding compliant.
* tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: arm: Fix SP805 clock-names
ARM: dts: arm: Fix SP805 clocks
ARM: dts: arm: Fix SP804 users
Link: https://lore.kernel.org/r/20200908135028.GA10106@bogus
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Add sound support to Galaxy S3/Midas family (Exynos4412).
2. Add sound support to Galaxy S/Aries family (S5Pv210).
3. Configure L2C-310 cache controller via DTS on Exynos4.
4. Big cleanup of Exynos DTS to fix as many dtschema warnings as
possible. This includes adding missing properties (thus e.g.
enabling S3C RTC clock), correcting existing nodes, renaming of
nodes and using non-deprecated properties or compatibles. Except
mentioned bring up of S3C RTC, this should not have visible
effect.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl9WFUUQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1+i0D/4w31PjRh194E9ChPvrOuuHUw2zia4GANAh
mKu6Rep+bZ0QhotA/wzqis1W/jAJrn/3w0o86ozOgBJ97ZlQbGmN0i0+kYAnNWe6
SZXMqPSYUGR//Ex+U7XxCqWIWGMocrlRAR69F+Zwgi7xznNirfTXdURORHpDbumG
rhQFet+E9bNElcyhkmyGehV3OlCTNta62kW6TMZGHNqXLlnyn64evI5SwJS5/5ea
edIlvKxC4vlVwMYV4qZwdlXCFgTrrHofo2+OwXrbR4kTr/rCdphfxwYy0jlYaTQf
q0TH+2CBpJ1qiNm0e4kSVFfAQEKiNiw547cRVI2FWMZmkEz5iaPVCKPNv2PtdRBD
+wwOXnBQ7DLgPkDdZYtTNWFF6AlCzNiLM7GA9sqOTmc5rBicndTeZ4v/2N+zWCfb
7/vF1Hg4GD9EmHYPLhjRd3PapvIys3kg5TUNwWqSk/U+Z1MxAgL/55wzr3YJIvs0
MpChCTHCpjvQ4IwkIj8qw4rOebZSiarZCQhy/Uf+SUXple8f+0jl9ID1T0xfJROb
M4dw/dnza+rl7fqgk6c1SOen5fGjPAPYjYhbFQZSQv9FkPbaFUnVOvft7P2egnp/
Sjo+uY2KsSfnN0tD5xM3gvcltKHNRska8ulIgQHD7KecWPh+XvWUaatuUqW37ypp
HrL1R4iZ8Q==
=V1Fr
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.10
1. Add sound support to Galaxy S3/Midas family (Exynos4412).
2. Add sound support to Galaxy S/Aries family (S5Pv210).
3. Configure L2C-310 cache controller via DTS on Exynos4.
4. Big cleanup of Exynos DTS to fix as many dtschema warnings as
possible. This includes adding missing properties (thus e.g.
enabling S3C RTC clock), correcting existing nodes, renaming of
nodes and using non-deprecated properties or compatibles. Except
mentioned bring up of S3C RTC, this should not have visible
effect.
* tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (49 commits)
ARM: dts: exynos: Silence SATA PHY warning in Exynos5250
ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards
ARM: dts: samsung: odroid-xu3: Move assigned-clock* properties to i2s0 node
ARM: dts: exynos: Use S2MPS11 clock in S3C RTC in SMDK5420
ARM: dts: exynos: Silence DP HPD pinctrl dtschema warning in Exynos5250 Spring
ARM: dts: exynos: Use S5M8767 clock in S3C RTC in Exynos5250 Spring
ARM: dts: exynos: Add max77686 clocks for S3C RTC in SMDK5250
ARM: dts: exynos: Override thermal by label in Exynos5250
ARM: dts: exynos: Correct whitespace and indentation issues in Exynos5
ARM: dts: exynos: Silence i2c-gpio dtschema warning in Exynos5250 Arndale
ARM: dts: exynos: Correct S3C RTC bindings in SMDK5410
ARM: dts: exynos: Remove unneeded address/size cells in Exynos5260 GIC
ARM: dts: exynos: Correct compatible for Exynos5260 GIC
ARM: dts: exynos: Correct compatible for Exynos5 GIC
ARM: dts: s5pv210: Enable audio on Aries boards
ARM: dts: exynos: Correct whitespace and indentation issues
ARM: dts: exynos: Correct S3C RTC bindings in Tiny4412
ARM: dts: exynos: Correct S3C RTC bindings in SMDK4412
ARM: dts: exynos: Add CPU cooling in Tiny4412
ARM: dts: exynos: Add CPU cooling in SMDK4412
...
Link: https://lore.kernel.org/r/20200907150425.11077-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
- Increase support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
board, and its display panel expansion board,
- Increase support for the RZ/G1H SoC on the iWave RainboW SoM (G21M)
and Qseven board (G21D),
- SATA support for the HopeRun HiHope RZ/G2N board,
- PCIe endpoint support for the RZ/G2M, RZ/G2E, and RZ/G2H SoCs,
- Audio support for the R-Car M3-W+ SoC.
- Minor fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCX1IGJwAKCRCKwlD9ZEnx
cKjGAPkB8Jcd9TsR5PGsuZ829aTqVVKZqh3A3rOwWZ3rsRwD3AD8DYKVolrsTA0d
VbbGki8kpE8uihvqS/9xSHnfLiC7jQ8=
=iYmH
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.10
- Increase support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
board, and its display panel expansion board,
- Increase support for the RZ/G1H SoC on the iWave RainboW SoM (G21M)
and Qseven board (G21D),
- SATA support for the HopeRun HiHope RZ/G2N board,
- PCIe endpoint support for the RZ/G2M, RZ/G2E, and RZ/G2H SoCs,
- Audio support for the R-Car M3-W+ SoC.
- Minor fixes and improvements.
* tag 'renesas-arm-dt-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (39 commits)
arm64: dts: renesas: Add HiHope RZ/G2H board with idk-1110wr display
arm64: dts: renesas: r8a774e1: Add cpuidle support for CA5x cores
arm64: dts: renesas: r8a774e1: Add FDP1 device nodes
ARM: dts: r8a7742-iwg21d-q7: Enable PCIe Controller
ARM: dts: r8a7742: Add IPMMU DT nodes
arm64: dts: renesas: r8a77961: Enable Sound / Audio-DMAC
arm64: dts: renesas: r8a774e1: Add PWM device nodes
ARM: dts: r8a7742-iwg21m: Add SPI NOR support
arm64: dts: renesas: r8a774e1-hihope-rzg2h: Enable HS400 mode
ARM: dts: r8a7742-iwg21m: Add RTC support
ARM: dts: r8a7742-iwg21m: Sort the nodes alphabetically
ARM: dts: r8a7742: Add CAN support
arm64: dts: renesas: r8a774c0: Add PCIe EP node
arm64: dts: renesas: r8a774b1: Add PCIe EP nodes
arm64: dts: renesas: r8a774a1: Add PCIe EP nodes
ARM: dts: r8a7742: Add QSPI support
arm64: dts: renesas: r8a774e1-hihope-rzg2h: Setup DU clocks
arm64: dts: renesas: r8a774e1: Add LVDS device node
arm64: dts: renesas: r8a774e1: Populate HDMI encoder node
arm64: dts: renesas: r8a774e1: Populate DU device node
...
Link: https://lore.kernel.org/r/20200904114819.30254-3-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
5.9, please pull the following:
- Florian fixes the Broadcom QSPI controller binding such that the most
specific compatible string is the left most one, and all existing
in-tree users are updated as well.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl9ZRnoACgkQh9CWnEQH
BwSdVQ/8Cgoo5vLte/teQdUNEYHjWQv7ZwgxUC2tFlbOOCI9EPvhj00KK/pNZA70
50B1ylLjDaku5/Ml0reqVnNUi05qubu7lhAS0DGlxoOCkpo1Lnp8EZO0XFjfg4sg
I8A8XvismXU8rJtvNMp6dQH0QzeDLzxT+N5hnINh6U9XUa/ZLVQ2ytykagCw4Qxh
DTQqg9CpBBTT0hnUjbF3z4tdWusQfXD4yCDm4YSaW3VsglHfUsfSqb71l1/vvyK2
hnW1q/kBIojiiz08JNzb7bWxjpW8ZLfro7idswho5Ypqai/lf0wAPxdlZmeikE+I
J0roea8nqIRcRvBPoAFa/QUr63wnL8IVwLBF08G9isJEr3rK8PD8kZmsyhe3g+AJ
e672hnGMhl7oCmJYvR5aIDb4GkyiTrhDdgFjWpCqUypwGXXhRUHuN5z0oNfVbOja
TjNq+VMIqYQ77fIYBWFH8BAHoyuRHaDvN/e5S0F9fFyJPtiuCJ0D2QGQLB0kf5yt
aJpy83Yebe5bMgQZdgyHsmnaYTaqkcCVCOK1Pirdc2vmHBDmDeDwCcqOPDACnTDt
e1DIug33YNI3Ksxjg9yzdIIeIol7pvUSCHKOqOcZgg6Fue0IIq1h27eKUrGXQsZV
QLTFaZyeVejUrgD3vZq2cZKkS5IvTwMRnyV3+1/spJ1u0IMtTLI=
=a2Q2
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.9/devicetree-fixes' of https://github.com/Broadcom/stblinux into arm/fixes
This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.9, please pull the following:
- Florian fixes the Broadcom QSPI controller binding such that the most
specific compatible string is the left most one, and all existing
in-tree users are updated as well.
* tag 'arm-soc/for-5.9/devicetree-fixes' of https://github.com/Broadcom/stblinux:
arm64: dts: ns2: Fixed QSPI compatible string
ARM: dts: BCM5301X: Fixed QSPI compatible string
ARM: dts: NSP: Fixed QSPI compatible string
ARM: dts: bcm: HR2: Fixed QSPI compatible string
dt-bindings: spi: Fix spi-bcm-qspi compatible ordering
Link: https://lore.kernel.org/r/20200909211857.4144718-1-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
- Fix the misspelling of 'interrupts' property in i.MX8MQ TMU DT node.
- Correct 'ahb' clock for i.MX8MP SDMA1 in device tree.
- Fix pad QSPI1B_SCLK mux mode for UART3 on i.MX6SX.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl9Y6BsUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM6xVggApTBRKs67uPBYQFPRpsPEnXmRuyD+
zDxLjyf5WKh71gP3zDPzMj2TTdz1tE0H4sGwLe5VDAfkhCSQxOtMpfDY22Ateq/O
DDwiN9DGslutyPy/a4pkysvwaJWJRJD1e1PsdX5fIB1gO8VUHW5qB066ADpXFhRv
t/yUUkBQGTxaBHaNkzhdWLiCgVVGkJGueCEp/A2Yg7nK38ibCQ6WdD1tcu+VQpxZ
bc9zo7ue2ZNYtMDSkc9OZgp7o7rK+J3LmjZMBOuIQS6VA4nh+6uTh3kpLXGGkhy6
FA8ZxXYv4qt1t6F9tuSP0XV0em9jkEUOvFT8ms0uVBi4fk7K5HvDaPFWPg==
=CYG2
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.9, round 2:
- Fix the misspelling of 'interrupts' property in i.MX8MQ TMU DT node.
- Correct 'ahb' clock for i.MX8MP SDMA1 in device tree.
- Fix pad QSPI1B_SCLK mux mode for UART3 on i.MX6SX.
* tag 'imx-fixes-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6sx: fix the pad QSPI1B_SCLK mux mode for uart3
arm64: dts: imx8mp: correct sdma1 clk setting
arm64: dts: imx8mq: Fix TMU interrupt property
Link: https://lore.kernel.org/r/20200909143844.GA25109@dragon
Signed-off-by: Olof Johansson <olof@lixom.net>
Few fixes for omap based devices:
- Fix of_clk_get() error handling for omap-iommu
- Fix missing audio pinctrl entries for logicpd boards
- Fix video for logicpd-som-lv after switch to generic panels
- Fix omap5 DSI clocks base
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl9QrUQRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNu4RAAtVOsU75qD8mH6pV3a1h6JQMMl4F5ksV7
AQNQLbnOCioZCvJ5yLkOtf2swNj3u8JdkvQ5twW3fphHlANydNIkrwP1w4JPNog8
H4FCokNoq1tC/7Kj12G40/3YjTCcbdtIJIsyNJ65Mszo1mO0bDEerVf/LCFN0z2K
K87BRGouTlEOMMxwruLLbNC69cZmhnyG3dWitGR6OLpMl1gfwdwNLi+a/BVuIoSZ
TBPf3yrBMdpDbH309vHZnwTc/hYwImTjRzGHSTQJseocHJEzpzsER/zOpBMmEWoa
Ycjy+4Ya5K0+fhKOvYQa7RMwJVN9seSVFNfnqdvFl0Tx8dShW70DrcacVPFQQpQ8
FHbsSEKKsKYDHWhpgl+8R0N9P4A38CsoRflCmmTQsQOCQJgxR40pL39y1V4qS2UM
6YLiNDnesXlNC5sjbj66jdop15yqMjXQjcVWyc4ruVfluO1pLMoAxWgHYjeTJWT4
jpJO3dprgkkkAewO2fPF14HzQg7PdIZDVpInvQeSB1uxkcnmKuYpGInGiXuGvupd
5Fat/lyeF/2mkwHRJ6INDejqF3cZti+OLcyPO4IncQvR83oMOmaZSJScp6/AKcRG
0vc8HulyZ6QoP4l/YfPxCnEgQ7YrzZINnuUaefbhuXfuujCIGe/J6CIlT0jHmgxv
xMpUPvQveN8=
=K8IT
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.9/fixes-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps for v5.9-rc cycle
Few fixes for omap based devices:
- Fix of_clk_get() error handling for omap-iommu
- Fix missing audio pinctrl entries for logicpd boards
- Fix video for logicpd-som-lv after switch to generic panels
- Fix omap5 DSI clocks base
* tag 'omap-for-v5.9/fixes-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap5: Fix DSI base address and clocks
ARM: dts: logicpd-som-lv-baseboard: Fix missing video
ARM: dts: logicpd-som-lv-baseboard: Fix broken audio
ARM: dts: logicpd-torpedo-baseboard: Fix broken audio
ARM: OMAP2+: Fix an IS_ERR() vs NULL check in _get_pwrdm()
Link: https://lore.kernel.org/r/pull-1599132064-54898@atomide.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Specify the National LM75 sensor including its vendor name, as mandated
by the binding docs.
Fixes: cac849e9bb ("ARM: dts: imx6qdl: add TQMa6{S,Q,QP} SoM")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This property is unneeded and not supported by the spi-imx driver.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The PMIC configuration is indented one level too deep.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix dtschema validator warnings like:
gic@fb001000: $nodename:0:
'gic@fb001000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Fix dtschema validator warnings like:
l2-cache-controller@c00000: $nodename:0:
'l2-cache-controller@c00000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
Fix dtschema validator warnings like:
l2-cache-controller@20100000: $nodename:0:
'l2-cache-controller@20100000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Mans Rullgard <mans@mansr.com>
Fix dtschema validator warnings like:
l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Fix dtschema validator warnings like:
l2-cache@2040000: $nodename:0:
'l2-cache@2040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Fix dtschema validator warnings like:
l2-cache-controller@80040000: $nodename:0:
'l2-cache-controller@80040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Barry Song <baohua@kernel.org>
The purpose of those assigned-clock-* properties is to configure clock for
the I2S device so move them to respective node. This silences the
dtschema warnings like:
'clocks' is a dependency of 'assigned-clocks'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200906142146.21266-3-krzk@kernel.org
Commit 6860510146 ("ARM: dts: exynos: Add support for audio over HDMI
for Odroid X/X2/U3") added assigned clocks under Clock Management Unit.
However the dtschema expects "clocks" property if "assigned-clocks" are
used. Add reference to input clock to silence the dtschema warnings:
arch/arm/boot/dts/exynos4412-odroidu3.dt.yaml: clock-controller@10030000: 'clocks' is a dependency of 'assigned-clocks'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200906142146.21266-2-krzk@kernel.org
Commit 52005dece5 ("ARM: dts: Add assigned clock parents to CMU node
for exynos3250") added assigned clocks under Clock Management Unit to
fix hangs when accessing ISP registers.
However the dtschema expects "clocks" property if "assigned-clocks" are
used. Add reference to input clock to silence the dtschema warnings:
arch/arm/boot/dts/exynos3250-artik5-eval.dt.yaml: clock-controller@10030000: 'clocks' is a dependency of 'assigned-clocks'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200906142146.21266-1-krzk@kernel.org
The fixed clocks are kept under dedicated 'clocks' node but this causes
multiple dtschema warnings:
clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
clocks: #size-cells:0:0: 0 is not one of [1, 2]
clocks: xti@0:reg:0: [0] is too short
clocks: 'ranges' is a required property
xti@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-12-krzk@kernel.org
The CPU nodes should be described as children of "cpus" bus node with
appropriate "reg" properties:
cpus: '#address-cells' is a required property
cpus: '#size-cells' is a required property
cpu: 'device_type' is a required property
cpu: 'reg' is a required property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-11-krzk@kernel.org
Although PWM is used on S3C24xx as clocksource/timer, the dtschema
expects the node to be named in certain format:
timer@51000000: $nodename:0: 'timer@51000000' does not match '^pwm(@.*|-[0-9a-f])*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-10-krzk@kernel.org
Using full paths to extend or override a device tree node is error
prone. If there was a typo error, a new node will be created instead of
extending the existing node. This will lead to run-time errors that
could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-9-krzk@kernel.org
Only the specific compatible (arm,arm1176jzf-s) is allowed by dtschema:
cpu@0: compatible: ['arm,arm1176jzf-s', 'arm,arm1176'] is too long
cpu@0: compatible: Additional items are not allowed ('arm,arm1176' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-7-krzk@kernel.org
The SROM controller is modeled with a bus so align the device node name
with dtschema to fix warning:
srom-cs1@18000000: $nodename:0: 'srom-cs1@18000000'
does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-6-krzk@kernel.org
The SROM controller is modeled with a bus so align the device node name
with dtschema to fix warning:
srom-cs1@18000000: $nodename:0: 'srom-cs1@18000000'
does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-5-krzk@kernel.org
The fixed clocks are kept under dedicated 'clocks' node but this causes
multiple dtschema warnings:
clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
clocks: #size-cells:0:0: 0 is not one of [1, 2]
clocks: oscillator@0:reg:0: [0] is too short
clocks: oscillator@1:reg:0: [1] is too short
clocks: 'ranges' is a required property
oscillator@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-4-krzk@kernel.org
The fixed clocks are kept under dedicated 'clocks' node but this causes
multiple dtschema warnings:
clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
clocks: #size-cells:0:0: 0 is not one of [1, 2]
clocks: oscillator@0:reg:0: [0] is too short
clocks: oscillator@1:reg:0: [1] is too short
clocks: 'ranges' is a required property
oscillator@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-3-krzk@kernel.org
The SROM bank 5 is at address 0xa8000000, just like the one put in "reg"
property of ethernet node. Fix the unit address of ethernet node.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-2-krzk@kernel.org
