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Commit Graph

551 Commits

Author SHA1 Message Date
Fan Fei
b572569183 PCI: tegra194: Rename tegra_pcie_dw to tegra194_pcie
Rename tegra_pcie_dw to tegra194_pcie to match the convention of
<driver>_pcie. No functional change intended.

[bhelgaas: rename functions similarly]
Link: https://lore.kernel.org/r/20211223011054.1227810-20-helgaas@kernel.org
Signed-off-by: Fan Fei <ffclaire1224@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
2022-01-03 15:05:28 -06:00
Fan Fei
733770d4a2 PCI: intel-gw: Rename intel_pcie_port to intel_pcie
Rename struct intel_pcie_port to intel_pcie to match the convention of
<driver>_pcie. No functional change intended.

Link: https://lore.kernel.org/r/20211223011054.1227810-11-helgaas@kernel.org
Signed-off-by: Fan Fei <ffclaire1224@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Rahul Tanwar <rtanwar@maxlinear.com>
2022-01-03 15:01:43 -06:00
Fan Fei
a622435fbe PCI: kirin: Prefer of_device_get_match_data()
The kirin driver only needs the device data, not the whole struct
of_device_id.  Use of_device_get_match_data() instead of of_match_device().
No functional change intended.

[bhelgaas: commit log]
Link: https://lore.kernel.org/r/20211223011054.1227810-8-helgaas@kernel.org
Signed-off-by: Fan Fei <ffclaire1224@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Xiaowei Song <songxiaowei@hisilicon.com>
Cc: Binghui Wang <wangbinghui@hisilicon.com>
2022-01-03 15:01:28 -06:00
Fan Fei
39a29fbd4e PCI: keystone: Prefer of_device_get_match_data()
The keystone driver only needs the device data, not the whole struct
of_device_id.  Use of_device_get_match_data() instead of of_match_device().
No functional change intended.

[bhelgaas: commit log]
Link: https://lore.kernel.org/r/20211223011054.1227810-7-helgaas@kernel.org
Signed-off-by: Fan Fei <ffclaire1224@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
2022-01-03 15:01:23 -06:00
Fan Fei
dc078f1571 PCI: dra7xx: Prefer of_device_get_match_data()
The dra7xx driver only needs the device data, not the whole struct
of_device_id.  Use of_device_get_match_data() instead of of_match_device().
No functional change intended.

[bhelgaas: commit log]
Link: https://lore.kernel.org/r/20211223011054.1227810-6-helgaas@kernel.org
Signed-off-by: Fan Fei <ffclaire1224@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
2022-01-03 15:01:16 -06:00
Fan Fei
5c204204cf PCI: designware-plat: Prefer of_device_get_match_data()
The designware-plat driver only needs the device data, not the whole struct
of_device_id.  Use of_device_get_match_data() instead of of_match_device().
No functional change intended.

[bhelgaas: commit log]
Link: https://lore.kernel.org/r/20211223011054.1227810-5-helgaas@kernel.org
Signed-off-by: Fan Fei <ffclaire1224@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
2022-01-03 15:01:09 -06:00
Fan Fei
7073f2ceca PCI: artpec6: Prefer of_device_get_match_data()
The artpec6 driver only needs the device data, not the whole struct
of_device_id.  Use of_device_get_match_data() instead of of_match_device().
No functional change intended.

[bhelgaas: commit log]
Link: https://lore.kernel.org/r/20211223011054.1227810-3-helgaas@kernel.org
Signed-off-by: Fan Fei <ffclaire1224@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
2022-01-03 15:00:55 -06:00
Richard Zhu
178e244cb6 PCI: imx: Add the imx8mm pcie support
i.MX8MM PCIe works mostly like the i.MX8MQ one, but has a different PHY
and allows to output the internal PHY reference clock via the refclk pad.
Add the i.MX8MM PCIe support based on the standalone PHY driver.

Link: https://lore.kernel.org/r/1640312885-31142-2-git-send-email-hongxing.zhu@nxp.com
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
2021-12-26 12:13:32 +00:00
Krzysztof Wilczyński
549bf94dd2 PCI: qcom-ep: Remove surplus dev_err() when using platform_get_irq_byname()
There is no need to call the dev_err() function directly to print a
custom message when handling an error from either the platform_get_irq()
or platform_get_irq_byname() functions as both are going to display an
appropriate error message in case of a failure.

This change is as per suggestions from Coccinelle, e.g.,
  drivers/pci/controller/dwc/pcie-qcom-ep.c:556:2-9: line 556 is redundant because platform_get_irq() already prints an error

Related:
  https://lore.kernel.org/all/20210310131913.2802385-1-kw@linux.com/
  https://lore.kernel.org/all/20200802142601.1635926-1-kw@linux.com/

Link: https://lore.kernel.org/r/20211027112931.37182-1-kw@linux.com
Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2021-12-06 11:38:20 +00:00
Manivannan Sadhasivam
3f13d611aa PCI: qcom: Use __be16 type to store return value from cpu_to_be16()
cpu_to_be16() returns __be16 value but the driver uses u16 and that's
incorrect. Fix it by using __be16 as the data type of bdf_be variable.

The issue was spotted by the below sparse warning:

sparse warnings: (new ones prefixed by >>)
>> drivers/pci/controller/dwc/pcie-qcom.c:1305:30: sparse: sparse: incorrect type in initializer (different base types) @@     expected unsigned short [usertype] bdf_be @@     got restricted __be16 [usertype] @@
   drivers/pci/controller/dwc/pcie-qcom.c:1305:30: sparse:     expected unsigned short [usertype] bdf_be
   drivers/pci/controller/dwc/pcie-qcom.c:1305:30: sparse:     got restricted __be16 [usertype]

Link: https://lore.kernel.org/r/20211130080924.266116-1-manivannan.sadhasivam@linaro.org
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
2021-12-06 10:29:43 +00:00
Jakub Kicinski
8581fd402a treewide: Add missing includes masked by cgroup -> bpf dependency
cgroup.h (therefore swap.h, therefore half of the universe)
includes bpf.h which in turn includes module.h and slab.h.
Since we're about to get rid of that dependency we need
to clean things up.

v2: drop the cpu.h include from cacheinfo.h, it's not necessary
and it makes riscv sensitive to ordering of include files.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Acked-by: Krzysztof Wilczyński <kw@linux.com>
Acked-by: Peter Chen <peter.chen@kernel.org>
Acked-by: SeongJae Park <sj@kernel.org>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Link: https://lore.kernel.org/all/20211120035253.72074-1-kuba@kernel.org/  # v1
Link: https://lore.kernel.org/all/20211120165528.197359-1-kuba@kernel.org/ # cacheinfo discussion
Link: https://lore.kernel.org/bpf/20211202203400.1208663-1-kuba@kernel.org
2021-12-03 10:58:13 -08:00
Tim Harvey
6e5ebc96ec PCI: dwc: Do not remap invalid res
On imx6 and perhaps others when pcie probes you get a:
imx6q-pcie 33800000.pcie: invalid resource

This occurs because the atu is not specified in the DT and as such it
should not be remapped.

Link: https://lore.kernel.org/r/20211101180243.23761-1-tharvey@gateworks.com
Fixes: 281f1f99cf ("PCI: dwc: Detect number of iATU windows")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
2021-12-02 09:41:43 +00:00
Christophe JAILLET
4e0e90539b PCI: qcom: Fix an error handling path in 'qcom_pcie_probe()'
If 'of_device_get_match_data()' fails, previous 'pm_runtime_get_sync()/
pm_runtime_enable()' should be undone.

To fix it, the easiest is to move this block of code before the memory
allocations and the pm_runtime_xxx calls.

Link: https://lore.kernel.org/r/4d03c636193f64907c8dacb17fa71ed05fd5f60c.1636220582.git.christophe.jaillet@wanadoo.fr
Fixes: b89ff41025 ("PCI: qcom: Replace ops with struct pcie_cfg in pcie match data")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
2021-11-29 13:24:24 +00:00
Naveen Naidu
3cfdef7a57 PCI: keystone: Use PCI_ERROR_RESPONSE to identify config read errors
Include PCI_ERROR_RESPONSE along with 0xffffffff in the comment about
identifying config read errors. This makes checks for config read errors
easier to find. Comment change only.

Link: https://lore.kernel.org/r/6ae6b071d92052dc511407513e2a7c0035aff9e7.1637243717.git.naveennaidu479@gmail.com
Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2021-11-18 14:32:08 -06:00
Naveen Naidu
7dcd026fb7 PCI: kirin: Drop error data fabrication when config read fails
If config pci_ops.read() methods return failure, the PCI_OP_READ() and
PCI_USER_READ_CONFIG() wrappers use PCI_SET_ERROR_RESPONSE() to set the
data value, so there's no need to set it in the pci_ops.read() methods
themselves.

Drop the unnecessary data value fabrication when pci_ops.read() fails.

Link: https://lore.kernel.org/r/f87e22bc09a471d2cf15ad05dfd6432f57739aed.1637243717.git.naveennaidu479@gmail.com
Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2021-11-18 13:40:39 -06:00
Naveen Naidu
f4a44c1e25 PCI: histb: Drop error data fabrication when config read fails
If config pci_ops.read() methods return failure, the PCI_OP_READ() and
PCI_USER_READ_CONFIG() wrappers use PCI_SET_ERROR_RESPONSE() to set the
data value, so there's no need to set it in the pci_ops.read() methods
themselves.

Drop the unnecessary data value fabrication when pci_ops.read() fails.

Link: https://lore.kernel.org/r/7da7ea760abc5f85cad6e9b0d3e59eebd93f50d3.1637243717.git.naveennaidu479@gmail.com
Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2021-11-18 13:40:29 -06:00
Naveen Naidu
8ed2196a0a PCI: exynos: Drop error data fabrication when config read fails
If config pci_ops.read() methods return failure, the PCI_OP_READ() and
PCI_USER_READ_CONFIG() wrappers use PCI_SET_ERROR_RESPONSE() to set the
data value, so there's no need to set it in the pci_ops.read() methods
themselves.

Drop the unnecessary data value fabrication when pci_ops.read() fails.

Link: https://lore.kernel.org/r/765c2f27d85fcee4eb137023dc0a8f864eee9e36.1637243717.git.naveennaidu479@gmail.com
Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2021-11-18 13:40:16 -06:00
Bjorn Helgaas
cd48bff78a Merge branch 'remotes/lorenzo/pci/qcom'
- Add Qualcomm PCIe Endpoint controller driver and DT binding (Manivannan
  Sadhasivam)

- Add qcom struct for device-specific details in match data (Prasad
  Malisetty)

- Switch pcie_1_pipe_clk_src from TCXO to pipe clock after PHY init in
  SC7280 (Prasad Malisetty)

- Add .compatible device ID for SC8180x platform (Bjorn Andersson)

* remotes/lorenzo/pci/qcom:
  PCI: qcom: Add sc8180x compatible
  PCI: qcom: Switch pcie_1_pipe_clk_src after PHY init in SC7280
  PCI: qcom: Replace ops with struct pcie_cfg in pcie match data
  MAINTAINERS: Add entry for Qualcomm PCIe Endpoint driver and binding
  PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller driver
  dt-bindings: PCI: Add Qualcomm PCIe Endpoint controller
2021-11-05 11:28:52 -05:00
Bjorn Helgaas
581e8fcec5 Merge branch 'pci/host/kirin'
- Reorganize to separate out PHY logic (Mauro Carvalho Chehab)

- Add support for external PHY in addition to the internal PHY (Mauro
  Carvalho Chehab)

- Use regmap so both kirin driver and PHY can access APB registers (Mauro
  Carvalho Chehab)

- Add support for per-lane PERST# GPIOs on HiKey970 external PEX 8606 PCI
  bridge (Mauro Carvalho Chehab)

- Add "hisilicon,kirin970-pcie" compatible string (Mauro Carvalho Chehab)

- Add MODULE_* macros (Mauro Carvalho Chehab)

- Allow building as a module (Mauro Carvalho Chehab)

- Add power_off support for Kirin 960 PHY (Mauro Carvalho Chehab)

- Disable clkreq during poweroff sequence (Mauro Carvalho Chehab)

- De-init the dwc driver during remove (Mauro Carvalho Chehab)

- Allow removal of kirin driver (Mauro Carvalho Chehab)

* pci/host/kirin:
  PCI: kirin: Allow removing the driver
  PCI: kirin: De-init the dwc driver
  PCI: kirin: Disable clkreq during poweroff sequence
  PCI: kirin: Move the power-off code to a common routine
  PCI: kirin: Add power_off support for Kirin 960 PHY
  PCI: kirin: Allow building it as a module
  PCI: kirin: Add MODULE_* macros
  PCI: kirin: Add Kirin 970 compatible
  PCI: kirin: Support PERST# GPIOs for HiKey970 external PEX 8606 bridge
  PCI: kirin: Use regmap for APB registers
  PCI: kirin: Add support for a PHY layer
  PCI: kirin: Reorganize the PHY logic inside the driver
2021-11-05 11:28:51 -05:00
Bjorn Helgaas
1f42bc19bb Merge branch 'remotes/lorenzo/pci/imx6'
- Remove unused assignment (Krzysztof Wilczyński)

* remotes/lorenzo/pci/imx6:
  PCI: imx6: Remove unused assignment to variable ret
2021-11-05 11:28:50 -05:00
Mauro Carvalho Chehab
e4c72797fd PCI: kirin: Allow removing the driver
Now that everything is in place at the poweroff sequence, this driver can
use module_platform_driver(), which allows it to be removed.

Link: https://lore.kernel.org/r/53b40494252444a9b830827922c4e3a301b8f863.1634812676.git.mchehab+huawei@kernel.org
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04 14:34:23 -05:00
Mauro Carvalho Chehab
dc47d2f4c0 PCI: kirin: De-init the dwc driver
The logic under .remove ops is missing a call to dw_pcie_host_deinit(). Add
it, in order to allow the DWC core to be properly cleaned up.

Link: https://lore.kernel.org/r/838621e1c84ebaac153ccd9c36ea5e1254c61ead.1634812676.git.mchehab+huawei@kernel.org
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04 14:34:23 -05:00
Mauro Carvalho Chehab
5b1e8c00af PCI: kirin: Disable clkreq during poweroff sequence
The logic at kirin_pcie_gpio_request() enables some clkreq GPIO lines.
Disable them during power-off.

Link: https://lore.kernel.org/r/f403e590843de1a581cade2d534d34715706f54e.1634812676.git.mchehab+huawei@kernel.org
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04 14:34:23 -05:00
Mauro Carvalho Chehab
79cf014bf3 PCI: kirin: Move the power-off code to a common routine
Instead of having two copies of the same logic, place the power-off logic
in a separate function.

No functional changes.

Link: https://lore.kernel.org/r/64f6e8da3e5fff38b6c8fcb208ace46efe6555bb.1634812676.git.mchehab+huawei@kernel.org
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04 14:34:23 -05:00
Mauro Carvalho Chehab
76afbdc76b PCI: kirin: Add power_off support for Kirin 960 PHY
In order to prepare for module unload, add a power_off method for HiKey
960.

Link: https://lore.kernel.org/r/b095818b0d7fadae4cae200f481caf7a66e61fb4.1634812676.git.mchehab+huawei@kernel.org
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04 14:34:23 -05:00
Mauro Carvalho Chehab
aed9d9e449 PCI: kirin: Allow building it as a module
There's nothing preventing this driver from being loaded as a module.
Change its config from bool to tristate.

Link: https://lore.kernel.org/r/b5e7cfe9df09b492750bd6db0f0c911eaae8c2d4.1634812676.git.mchehab+huawei@kernel.org
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04 14:34:23 -05:00
Mauro Carvalho Chehab
a4099c59a4 PCI: kirin: Add MODULE_* macros
This driver misses the MODULE_* macros. Add them.

Link: https://lore.kernel.org/r/f7a951d0c2009f5765214fc2e83e24cf41585023.1634812676.git.mchehab+huawei@kernel.org
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04 14:34:23 -05:00
Mauro Carvalho Chehab
e636c16909 PCI: kirin: Add Kirin 970 compatible
Now that everything is in place, add a compatible for Kirin 970.

Link: https://lore.kernel.org/r/ac8c730c0300b90d96bdaaf387d458d8949241a9.1634812676.git.mchehab+huawei@kernel.org
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04 14:34:23 -05:00
Mauro Carvalho Chehab
b22dbbb245 PCI: kirin: Support PERST# GPIOs for HiKey970 external PEX 8606 bridge
On HiKey970, there's a PEX 8606 PCI bridge on its PHY with 6 lanes. Only 4
lanes are connected:

  lane 0 - connected to Kirin 970 (upstream)
  lane 4 - M.2 slot
  lane 5 - mini PCIe slot
  lane 6 - on-board Ethernet controller

Each lane has its own PERST# GPIO pin and needs a clock request.

Add support to parse a DT schema containing the above data.

HiKey 970 requires a little more waiting time for the PCI bridge - which is
outside the SoC - to finish the PERST# reset, and then initialize the eye
diagram.

Increase the waiting time for the PERST# signals accordingly.

[bhelgaas: squash refcount fix from Wan Jiabing <wanjiabing@vivo.com>:
https://lore.kernel.org/r/20211103062518.25695-1-wanjiabing@vivo.com
and drop "parent" refcount per
https://lore.kernel.org/all/20211103143059.GA683503@bhelgaas/]
Link: https://lore.kernel.org/r/bb391a0e0f0863b66e645048315fab1a4f63f277.1634812676.git.mchehab+huawei@kernel.org
Link: https://lore.kernel.org/all/9a365cffe5af9ec5a1f79638968c3a2efa979b65.1634622716.git.mchehab+huawei@kernel.org/
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
2021-11-04 14:32:21 -05:00
Mauro Carvalho Chehab
d19afe7be1 PCI: kirin: Use regmap for APB registers
The PHY layer need to access APB registers too, for Kirin 970.  So place
them into a named regmap.

Link: https://lore.kernel.org/r/daf0e4bda5a69a5ac8484e70f09351a959805c8c.1634812676.git.mchehab+huawei@kernel.org
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-02 10:43:59 -05:00
Mauro Carvalho Chehab
000f60db78 PCI: kirin: Add support for a PHY layer
The pcie-kirin driver contains both PHY and generic PCI driver.

The best would be, instead, to support a PCI PHY driver, making the driver
more generic.

However, it is too late to remove the Kirin 960 PHY, as a change like that
would make the DT schema incompatible with past versions.

So, add support for an external PHY driver without removing the existing
Kirin 960 PHY from it.

Link: https://lore.kernel.org/r/f38361df2e9d0dc5a38ff942b631f7fef64cdc12.1634812676.git.mchehab+huawei@kernel.org
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-02 10:43:37 -05:00
Mauro Carvalho Chehab
61d3754743 PCI: kirin: Reorganize the PHY logic inside the driver
The pcie-kirin PCIe driver contains internally a PHY interface for
Kirin 960.

As the next patches will add support for using an external PHY driver,
reorganize the driver in a way that the PHY part will be self-contained.

This could be moved to a separate PHY driver, but a change like that would
mean a non-backward-compatible DT schema change.

Link: https://lore.kernel.org/r/ad2f4aa6bbb71d5c9af0139704672f75f12644fc.1634812676.git.mchehab+huawei@kernel.org
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
2021-11-02 10:43:13 -05:00
Kunihiko Hayashi
4caab28a62 PCI: uniphier: Serialize INTx masking/unmasking and fix the bit operation
The condition register PCI_RCV_INTX is used in irq_mask() and irq_unmask()
callbacks. Accesses to register can occur at the same time without a lock.
Add a lock into each callback to prevent the issue.

And INTX mask and unmask fields in PCL_RCV_INTX register should only be
set/reset for each bit. Clearing by PCL_RCV_INTX_ALL_MASK should be
removed.

INTX status fields in PCL_RCV_INTX register only indicates each INTX
interrupt status, so the handler can't clear by writing 1 to the field.
The status is expected to be cleared by the interrupt origin.
The ack function has no meaning, so should remove it.

Suggested-by: Pali Rohár <pali@kernel.org>
Link: https://lore.kernel.org/r/1631924579-24567-1-git-send-email-hayashi.kunihiko@socionext.com
Fixes: 7e6d5cd88a ("PCI: uniphier: Add UniPhier PCIe host controller support")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Pali Rohár <pali@kernel.org>
Acked-by: Marc Zyngier <maz@kernel.org>
2021-10-15 10:15:53 +01:00
Bjorn Andersson
45a3ec8913 PCI: qcom: Add sc8180x compatible
The SC8180x platform comes with 4 PCIe controllers, typically used for
things such as NVME storage or connecting a SDX55 5G modem. Add a
compatible for this, that just reuses the 1.9.0 ops.

Link: https://lore.kernel.org/linux-arm-msm/20210725040038.3966348-4-bjorn.andersson@linaro.org/
Link: https://lore.kernel.org/r/20210823154958.305677-2-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
[lorenzo.pieralisi@arm.com: updated match data structure]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2021-10-15 10:12:56 +01:00
Prasad Malisetty
aa9c0df98c PCI: qcom: Switch pcie_1_pipe_clk_src after PHY init in SC7280
On the SC7280, the clock source for gcc_pcie_1_pipe_clk_src must be the
TCXO while gdsc is enabled. After PHY init successful clock source should
switch to pipe clock for gcc_pcie_1_pipe_clk_src.

Link: https://lore.kernel.org/r/1633628923-25047-6-git-send-email-pmaliset@codeaurora.org
Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
2021-10-14 16:54:27 -05:00
Prasad Malisetty
b89ff41025 PCI: qcom: Replace ops with struct pcie_cfg in pcie match data
Add struct qcom_pcie_cfg as match data for all platforms.  Assign
appropriate platform ops into struct qcom_pcie_cfg and read using
of_device_get_match_data() in qcom_pcie_probe().

Link: https://lore.kernel.org/r/1633628923-25047-5-git-send-email-pmaliset@codeaurora.org
Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
2021-10-14 16:53:37 -05:00
Bjorn Andersson
7e919677bb PCI: dwc: Perform host_init() before registering msi
On the Qualcomm sc8180x platform the bootloader does something related
to PCI that leaves a pending "msi" interrupt, which with the current
ordering often fires before init has a chance to enable the clocks that
are necessary for the interrupt handler to access the hardware.

Move the host_init() call before the registration of the "msi" interrupt
handler to ensure the host driver has a chance to enable the clocks.

The assignment of the bridge's ops and child_ops is moved along, because
at least the TI Keystone driver overwrites these in its host_init
callback.

Link: https://lore.kernel.org/r/20210823154958.305677-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2021-10-12 13:46:02 +01:00
Manivannan Sadhasivam
f55fee56a6 PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller driver
Add driver for Qualcomm PCIe Endpoint controller based on the DesignWare
core with added Qualcomm-specific wrapper around the core. The driver
support is very basic such that it supports only enumeration, PCIe
read/write, and MSI. There is no ASPM and PM support for now but these will
be added later.

The driver is capable of using the PERST# and WAKE# side-band GPIOs for
operation and written on top of the DWC PCI framework.

[bhelgaas: wrap a few long lines]
Co-developed-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
[mani: restructured the driver and fixed several bugs for upstream]
Link: https://lore.kernel.org/r/20210920065946.15090-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2021-10-11 15:34:02 -05:00
Krzysztof Wilczyński
5b8402562e PCI: visconti: Remove surplus dev_err() when using platform_get_irq_byname()
There is no need to call the dev_err() function directly to print a
custom message when handling an error from either the platform_get_irq()
or platform_get_irq_byname() functions as both are going to display an
appropriate error message in case of a failure.

This change is as per suggestions from Coccinelle, e.g.,
  drivers/pci/controller/dwc/pcie-visconti.c:286:2-9: line 286 is redundant because platform_get_irq() already prints an error

Related:
  https://lore.kernel.org/all/20210310131913.2802385-1-kw@linux.com/
  https://lore.kernel.org/all/20200802142601.1635926-1-kw@linux.com/

Link: https://lore.kernel.org/r/20211007122848.3366-1-kw@linux.com
Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2021-10-07 16:03:57 +01:00
Andy Shevchenko
8faa1d2def PCI: dwc: Clean up Kconfig dependencies (PCIE_DW_EP)
The "depends on" Kconfig construct is a no-op in options that
are selected and therefore has no effect. Remove it.

Clean up the users of PCIE_DW_EP and introduce idiom

	depends on PCI_ENDPOINT
	select PCIE_DW_EP

for all of them.

Link: https://lore.kernel.org/r/20210623140103.47818-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2021-10-07 15:55:51 +01:00
Andy Shevchenko
2908a0d81f PCI: dwc: Clean up Kconfig dependencies (PCIE_DW_HOST)
The "depends on" Kconfig construct is a no-op in options that
are selected and therefore has no effect. Remove it.

Furthermore, there is no need to repeat menu dependencies (PCI).

Clean up the users of PCIE_DW_HOST and introduce idiom

	depends on PCI_MSI_IRQ_DOMAIN
	select PCIE_DW_HOST

for all of them.

Link: https://lore.kernel.org/r/20210623140103.47818-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2021-10-07 15:55:51 +01:00
Krzysztof Wilczyński
65315ec52c PCI: imx6: Remove unused assignment to variable ret
Previously, the maximum link speed was set following an "fsl,max-link-speed"
property read, and should the read failed, then the PCIe generation was
manually set to PCIe Gen1 and thus limiting the link speed to 2.5 GT/s.

Code refactoring completed in the commit 39bc500650 ("PCI: dwc:
Centralize link gen setting") changed to the logic that was previously
used to limit the maximum link speed leaving behind an unused assignment
to a variable "ret".

Since the value returned from the of_property_read_u32() and stored in
the variable "ret" is never used in any meaningful way, and it's also
immediately reassigned in the code that follows, the assignment can be
removed.

Link: https://lore.kernel.org/r/20211003025439.84783-1-kw@linux.com
Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2021-10-05 10:05:14 +01:00
Luca Ceresoli
5af9405397 PCI: dra7xx: Get an optional clock
If the clock is provided externally we need to make sure it is enabled
before starting PCI scan.

Link: https://lore.kernel.org/r/20210531085934.2662457-5-luca@lucaceresoli.net
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2021-09-30 09:52:16 +01:00
Luca Ceresoli
b9a6943dc8 PCI: dra7xx: Remove unused include
Unused since commit e259c2926c ("PCI: pci-dra7xx: Prepare for deferred
probe with module_platform_driver").

Link: https://lore.kernel.org/r/20210531085934.2662457-4-luca@lucaceresoli.net
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2021-09-30 09:52:16 +01:00
Luca Ceresoli
3b868d150e PCI: dra7xx: Make it a kernel module
Enable building the driver as a loadable kernel module.

Link: https://lore.kernel.org/r/20210531085934.2662457-3-luca@lucaceresoli.net
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2021-09-30 09:52:16 +01:00
Luca Ceresoli
3a7fb86758 PCI: dwc: Export more symbols to allow modular drivers
These symbols are used by the pci-dra7xx driver. Export them to allow
building pci-dra7xx as a module.

Link: https://lore.kernel.org/r/20210531085934.2662457-2-luca@lucaceresoli.net
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2021-09-30 09:52:16 +01:00
Bjorn Helgaas
6e129176c3 Merge branch 'remotes/lorenzo/pci/endpoint'
- Add max-virtual-functions to endpoint binding (Kishon Vijay Abraham I)

- Add pci_epf_add_vepf() API to add virtual function to endpoint (Kishon
  Vijay Abraham I)

- Add pci_epf_vepf_link() to link virtual function to endpoint physical
  function (Kishon Vijay Abraham I)

- Add virtual function number to pci_epc_ops endpoint ops interfaces
  (Kishon Vijay Abraham I)

- Simplify register base address computation for endpoint BAR configuration
  (Kishon Vijay Abraham I)

- Add support to configure virtual functions in cadence endpoint driver
  (Kishon Vijay Abraham I)

- Add SR-IOV configuration to endpoint test driver (Kishon Vijay Abraham I)

- Document configfs usage to create virtual functions for endpoints (Kishon
  Vijay Abraham I)

* remotes/lorenzo/pci/endpoint:
  Documentation: PCI: endpoint/pci-endpoint-cfs: Guide to use SR-IOV
  misc: pci_endpoint_test: Populate sriov_configure ops to configure SR-IOV device
  PCI: cadence: Add support to configure virtual functions
  PCI: cadence: Simplify code to get register base address for configuring BAR
  PCI: endpoint: Add virtual function number in pci_epc ops
  PCI: endpoint: Add support to link a physical function to a virtual function
  PCI: endpoint: Add support to add virtual function in endpoint core
  dt-bindings: PCI: pci-ep: Add binding to specify virtual function
2021-09-02 14:56:51 -05:00
Bjorn Helgaas
4a4547db56 Merge branch 'remotes/lorenzo/pci/tegra194'
- Fix handling BME_CHGED event (Om Prakash Singh)

- Fix MSI-X programming (Om Prakash Singh)

- Disable interrupts before entering L2 (Om Prakash Singh)

- Don't allow suspend when Tegra PCIe is in EP mode (Om Prakash Singh)

* remotes/lorenzo/pci/tegra194:
  PCI: tegra194: Cleanup unused code
  PCI: tegra194: Don't allow suspend when Tegra PCIe is in EP mode
  PCI: tegra194: Disable interrupts before entering L2
  PCI: tegra194: Fix MSI-X programming
  PCI: tegra194: Fix handling BME_CHGED event
2021-09-02 14:56:50 -05:00
Bjorn Helgaas
af42a0d4a8 Merge branch 'remotes/lorenzo/pci/keembay'
- Add Intel Keem Bay PCIe controller driver and DT binding (Srikanth
  Thokala)

* remotes/lorenzo/pci/keembay:
  PCI: keembay: Add support for Intel Keem Bay
  dt-bindings: PCI: Add Intel Keem Bay PCIe controller
2021-09-02 14:56:48 -05:00
Bjorn Helgaas
a549a33c37 Merge branch 'pci/visconti'
- Add Toshiba Visconti PCIe host controller driver (Nobuhiro Iwamatsu)

* pci/visconti:
  MAINTAINERS: Add entries for Toshiba Visconti PCIe controller
  PCI: visconti: Add Toshiba Visconti PCIe host controller driver
2021-09-02 14:56:46 -05:00
Bjorn Helgaas
0e52059a82 Merge branch 'pci/rockchip-dwc'
- Add Rockchip RK356X host controller driver (Simon Xue)

* pci/rockchip-dwc:
  PCI: rockchip-dwc: Add Rockchip RK356X host controller driver
2021-09-02 14:56:45 -05:00
Bjorn Helgaas
bd8bb4d097 Merge branch 'pci/dwc'
- Remove surplus break statement (Krzysztof Wilczyński)

* pci/dwc:
  PCI: dwc: Remove surplus break statement after return
2021-09-02 14:56:45 -05:00
Bjorn Helgaas
dbf0b9bad0 Merge branch 'pci/artpec6'
- Remove surplus break statement and local code block (Krzysztof
  Wilczyński)

* pci/artpec6:
  PCI: artpec6: Remove local code block from switch statement
  PCI: artpec6: Remove surplus break statement after return
2021-09-02 14:56:45 -05:00
Simon Xue
0e898eb8df PCI: rockchip-dwc: Add Rockchip RK356X host controller driver
Add a driver for the DesignWare-based PCIe controller found on
RK356X. The existing pcie-rockchip-host driver is only used for
the Rockchip-designed IP found on RK3399.

Link: https://lore.kernel.org/r/20210625065511.1096935-1-xxm@rock-chips.com
Tested-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2021-08-31 14:58:20 -05:00
Krzysztof Wilczyński
71121fdd79 PCI: dwc: Remove surplus break statement after return
As part of code refactoring completed in a0fd361db8 ("PCI: dwc: Move
"dbi", "dbi2", and "addr_space" resource setup into common code"),
dw_plat_add_pcie_ep() was removed and the call to the dw_pcie_ep_init() was
moved into dw_plat_pcie_probe().

This left a break statement behind that is not needed any more as as
dw_plat_pcie_probe() returns immediately after calling dw_pcie_ep_init().

Remove this surplus break statement that became dead code.

Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20210701210252.1638709-1-kw@linux.com
Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2021-08-31 14:56:43 -05:00
Krzysztof Wilczyński
30492c12d2 PCI: artpec6: Remove local code block from switch statement
The switch statement in the artpec6_pcie_probe() has a local code block
where "val" is defined and immediately used by the artpec6_pcie_readl().

This extra code block adds brackets at the same indentation level as the
switch statement itself which can hinder readability of the code.

Move the "val" declaration to the top of the function and remove
the extra code block from the switch statement.

Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20210701204401.1636562-2-kw@linux.com
Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
2021-08-31 14:54:33 -05:00
Krzysztof Wilczyński
ee6f85683e PCI: artpec6: Remove surplus break statement after return
As part of code refactoring completed in a0fd361db8 ("PCI: dwc: Move
"dbi", "dbi2", and "addr_space" resource setup into common code"),
artpec6_add_pcie_ep() was removed and the call to the dw_pcie_ep_init()
was moved into artpec6_pcie_probe().

This left a break statement behind that is not needed any more as
artpec6_pcie_probe() returns immediately after calling dw_pcie_ep_init().

Remove this surplus break statement that became dead code.

Link: https://lore.kernel.org/r/20210701204401.1636562-1-kw@linux.com
Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
2021-08-31 14:53:06 -05:00
Nobuhiro Iwamatsu
da36024a4e PCI: visconti: Add Toshiba Visconti PCIe host controller driver
Add support for the PCIe RC controller on Toshiba Visconti ARM SoCs.  This
PCIe controller is based on the Synopsys DesignWare PCIe core.

Link: https://lore.kernel.org/r/20210811083830.784065-3-nobuhiro1.iwamatsu@toshiba.co.jp
Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2021-08-31 14:52:05 -05:00
Srikanth Thokala
0c87f90b4c PCI: keembay: Add support for Intel Keem Bay
Add driver for Intel Keem Bay SoC PCIe controller. This controller
is based on DesignWare PCIe core.

In Root Complex mode, only internal reference clock is possible for
Keem Bay A0. For Keem Bay B0, external reference clock can be used
and will be the default configuration. Currently, keembay_pcie_of_data
structure has one member. It will be expanded later to handle this
difference.

Endpoint mode link initialization is handled by the boot firmware.

Link: https://lore.kernel.org/r/20210805211010.29484-3-srikanth.thokala@intel.com
Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Signed-off-by: Srikanth Thokala <srikanth.thokala@intel.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-08-20 13:47:05 +01:00
Kishon Vijay Abraham I
53fd3cbe5e PCI: endpoint: Add virtual function number in pci_epc ops
Add virtual function number in pci_epc ops. EPC controller driver
can perform virtual function specific initialization based on the
virtual function number.

Link: https://lore.kernel.org/r/20210819123343.1951-5-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2021-08-19 14:13:28 +01:00
Om Prakash Singh
f62750e691 PCI: tegra194: Cleanup unused code
Remove unused code from function tegra_pcie_config_ep.

Link: https://lore.kernel.org/r/20210623100525.19944-6-omp@nvidia.com
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Vidya Sagar <vidyas@nvidia.com>
2021-08-04 12:28:17 +01:00
Om Prakash Singh
de2bbf2b71 PCI: tegra194: Don't allow suspend when Tegra PCIe is in EP mode
When Tegra PCIe is in endpoint mode it should be available for root port.
PCIe link up by root port fails if it is in suspend state. So, don't allow
Tegra to suspend when endpoint mode is enabled.

Link: https://lore.kernel.org/r/20210623100525.19944-5-omp@nvidia.com
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Vidya Sagar <vidyas@nvidia.com>
2021-08-04 12:28:17 +01:00
Om Prakash Singh
834c5cf2b5 PCI: tegra194: Disable interrupts before entering L2
In suspend_noirq() call if link doesn't goto L2, PERST# is asserted
to bring link to detect state. However, this is causing surprise
link down AER error. Since Kernel is executing noirq suspend calls,
AER interrupt is not processed. PME and AER are shared interrupts
and PCIe subsystem driver enables wake capability of PME irq during
suspend. So this AER will cause suspend failure due to pending
AER interrupt.

After PCIe link is in L2, interrupts are not expected since PCIe
controller will be in reset state. Disable PCIe interrupts before
going to L2 state to avoid pending AER interrupt.

Link: https://lore.kernel.org/r/20210623100525.19944-4-omp@nvidia.com
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Vidya Sagar <vidyas@nvidia.com>
2021-08-04 12:28:17 +01:00
Om Prakash Singh
43537cf7e3 PCI: tegra194: Fix MSI-X programming
Lower order MSI-X address is programmed in MSIX_ADDR_MATCH_HIGH_OFF
DBI register instead of higher order address. This patch fixes this
programming mistake.

Link: https://lore.kernel.org/r/20210623100525.19944-3-omp@nvidia.com
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Vidya Sagar <vidyas@nvidia.com>
2021-08-04 12:28:17 +01:00
Om Prakash Singh
ceb1412c1c PCI: tegra194: Fix handling BME_CHGED event
In tegra_pcie_ep_hard_irq(), APPL_INTR_STATUS_L0 is stored in val and again
APPL_INTR_STATUS_L1_0_0 is also stored in val. So when execution reaches
"if (val & APPL_INTR_STATUS_L0_PCI_CMD_EN_INT)", val is not correct.

Link: https://lore.kernel.org/r/20210623100525.19944-2-omp@nvidia.com
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Vidya Sagar <vidyas@nvidia.com>
2021-08-04 12:28:16 +01:00
Marc Zyngier
d21faba116 PCI: Bulk conversion to generic_handle_domain_irq()
Wherever possible, replace constructs that match either
generic_handle_irq(irq_find_mapping()) or
generic_handle_irq(irq_linear_revmap()) to a single call to
generic_handle_domain_irq().

Link: https://lore.kernel.org/r/20210802162630.2219813-4-maz@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-08-02 11:53:05 -05:00
Linus Torvalds
316a2c9b6a pci-v5.14-changes
-----BEGIN PGP SIGNATURE-----
 
 iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAmDl0F8UHGJoZWxnYWFz
 QGdvb2dsZS5jb20ACgkQWYigwDrT+vxkwA//dJmplIv12k94xy8rAlfMnNLg9TaO
 VEgKopeH1IZdFSwry7qTsTn6IJ1hZ6aSRrBJo+SYB5/V+kTSbsW9htyL2ZEjU1s0
 MBb6b1T6qKwKoFqMrxSMeF7nXbLy+NE6MhvlCa1wk0rbOoL5+f/t4nHblqV/Wrwh
 syzf7+sSfuJmJtzytnZ88Jo2f6EIifGQyMNgaUk9MEJSrydhavOUKKQia/9gOBz8
 Ogjnlh5pGdFQdSaLYhO0VXcimouJLqjVb/mvkE15hjzOTYw+NFaL9C3PDisxLdvQ
 sQCSFzmwJnXd2aKETPInqMamkYja+U7bCXlbt6xh2XREWioc1KLBpJpjTQeb2VxV
 w32otXCezfFJhmY2G+lLTRcGSTJ7OmBwqjTph9Pp2b4OYRNjXFtoMrLr6LxKMUuw
 dzpWUHuC/Ca+9iiMRTXJs11Bhdk1Sax3GM/Y6DzW5i/w9HWSIgvxEB7mB8jk/p6l
 C4IGOdTp2FtBjhnv5cgllMQqWd1a2cIGgF3gj7FmP5szVgoOJSyC4GgQXIe+91XO
 DM1gclWnFNyvi40bBvhsubBFeIVgzLksN7jjzsECJDpr8ql4yHiE1vcX0NqJ/qxE
 SpKnWv0m1aqUmYWSI6mvQrcsnxH5vs6O6cVoVxMzl4uhog2UzCLeiQyzpfDJpI7g
 s0FEqop9OjHkm40=
 =d0cQ
 -----END PGP SIGNATURE-----

Merge tag 'pci-v5.14-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull pci updates from Bjorn Helgaas:
 "Enumeration:
   - Fix dsm_label_utf16s_to_utf8s() buffer overrun (Krzysztof
     Wilczyński)
   - Rely on lengths from scnprintf(), dsm_label_utf16s_to_utf8s()
     (Krzysztof Wilczyński)
   - Use sysfs_emit() and sysfs_emit_at() in "show" functions (Krzysztof
     Wilczyński)
   - Fix 'resource_alignment' newline issues (Krzysztof Wilczyński)
   - Add 'devspec' newline (Krzysztof Wilczyński)
   - Dynamically map ECAM regions (Russell King)

  Resource management:
   - Coalesce host bridge contiguous apertures (Kai-Heng Feng)

  PCIe native device hotplug:
   - Ignore Link Down/Up caused by DPC (Lukas Wunner)

  Power management:
   - Leave Apple Thunderbolt controllers on for s2idle or standby
     (Konstantin Kharlamov)

  Virtualization:
   - Work around Huawei Intelligent NIC VF FLR erratum (Chiqijun)
   - Clarify error message for unbound IOV devices (Moritz Fischer)
   - Add pci_reset_bus_function() Secondary Bus Reset interface (Raphael
     Norwitz)

  Peer-to-peer DMA:
   - Simplify distance calculation (Christoph Hellwig)
   - Finish RCU conversion of pdev->p2pdma (Eric Dumazet)
   - Rename upstream_bridge_distance() and rework doc (Logan Gunthorpe)
   - Collect acs list in stack buffer to avoid sleeping (Logan
     Gunthorpe)
   - Use correct calc_map_type_and_dist() return type (Logan Gunthorpe)
   - Warn if host bridge not in whitelist (Logan Gunthorpe)
   - Refactor pci_p2pdma_map_type() (Logan Gunthorpe)
   - Avoid pci_get_slot(), which may sleep (Logan Gunthorpe)

  Altera PCIe controller driver:
   - Add Joyce Ooi as Altera PCIe maintainer (Joyce Ooi)

  Broadcom iProc PCIe controller driver:
   - Fix multi-MSI base vector number allocation (Sandor Bodo-Merle)
   - Support multi-MSI only on uniprocessor kernel (Sandor Bodo-Merle)

  Freescale i.MX6 PCIe controller driver:
   - Limit DBI register length for imx6qp PCIe (Richard Zhu)
   - Add "vph-supply" for PHY supply voltage (Richard Zhu)
   - Enable PHY internal regulator when supplied >3V (Richard Zhu)
   - Remove imx6_pcie_probe() redundant error message (Zhen Lei)

  Intel Gateway PCIe controller driver:
   - Fix INTx enable (Martin Blumenstingl)

  Marvell Aardvark PCIe controller driver:
   - Fix checking for PIO Non-posted Request (Pali Rohár)
   - Implement workaround for the readback value of VEND_ID (Pali Rohár)

  MediaTek PCIe controller driver:
   - Remove redundant error printing in mtk_pcie_subsys_powerup() (Zhen
     Lei)

  MediaTek PCIe Gen3 controller driver:
   - Add missing MODULE_DEVICE_TABLE (Zou Wei)

  Microchip PolarFlare PCIe controller driver:
   - Make struct event_descs static (Krzysztof Wilczyński)

  Microsoft Hyper-V host bridge driver:
   - Fix race condition when removing the device (Long Li)
   - Remove bus device removal unused refcount/functions (Long Li)

  Mobiveil PCIe controller driver:
   - Remove unused readl and writel functions (Krzysztof Wilczyński)

  NVIDIA Tegra PCIe controller driver:
   - Add missing MODULE_DEVICE_TABLE (Zou Wei)

  NVIDIA Tegra194 PCIe controller driver:
   - Fix tegra_pcie_ep_raise_msi_irq() ill-defined shift (Jon Hunter)
   - Fix host initialization during resume (Vidya Sagar)

  Rockchip PCIe controller driver:
   - Register IRQ handlers after device and data are ready (Javier
     Martinez Canillas)"

* tag 'pci-v5.14-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (48 commits)
  PCI/P2PDMA: Finish RCU conversion of pdev->p2pdma
  PCI: xgene: Annotate __iomem pointer
  PCI: Fix kernel-doc formatting
  PCI: cpcihp: Declare cpci_debug in header file
  MAINTAINERS: Add Joyce Ooi as Altera PCIe maintainer
  PCI: rockchip: Register IRQ handlers after device and data are ready
  PCI: tegra194: Fix tegra_pcie_ep_raise_msi_irq() ill-defined shift
  PCI: aardvark: Implement workaround for the readback value of VEND_ID
  PCI: aardvark: Fix checking for PIO Non-posted Request
  PCI: tegra194: Fix host initialization during resume
  PCI: tegra: Add missing MODULE_DEVICE_TABLE
  PCI: imx6: Enable PHY internal regulator when supplied >3V
  dt-bindings: imx6q-pcie: Add "vph-supply" for PHY supply voltage
  PCI: imx6: Limit DBI register length for imx6qp PCIe
  PCI: imx6: Remove imx6_pcie_probe() redundant error message
  PCI: intel-gw: Fix INTx enable
  PCI: iproc: Support multi-MSI only on uniprocessor kernel
  PCI: iproc: Fix multi-MSI base vector number allocation
  PCI: mediatek-gen3: Add missing MODULE_DEVICE_TABLE
  PCI: Dynamically map ECAM regions
  ...
2021-07-08 12:06:20 -07:00
Bjorn Helgaas
5a57de58a3 Merge branch 'pci/host/tegra194'
- Fix host init during resume (Vidya Sagar)

- Fix ill-defined MSI IRQ shift behavior (Jon Hunter)

* pci/host/tegra194:
  PCI: tegra194: Fix tegra_pcie_ep_raise_msi_irq() ill-defined shift
  PCI: tegra194: Fix host initialization during resume
2021-07-06 10:56:28 -05:00
Bjorn Helgaas
364a716bd7 Merge branch 'pci/host/intel-gw'
- Fix INTx enable (Martin Blumenstingl)

* pci/host/intel-gw:
  PCI: intel-gw: Fix INTx enable
2021-07-06 10:56:26 -05:00
Jon Hunter
f67092eff2 PCI: tegra194: Fix tegra_pcie_ep_raise_msi_irq() ill-defined shift
tegra_pcie_ep_raise_msi_irq() shifted a signed 32-bit value left by 31
bits.  The behavior of this is implementation-defined.

Replace the shift by BIT(), which is well-defined.

Found by cppcheck:

  $ cppcheck --enable=all drivers/pci/controller/dwc/pcie-tegra194.c
  Checking drivers/pci/controller/dwc/pcie-tegra194.c ...

  drivers/pci/controller/dwc/pcie-tegra194.c:1829:23: portability: Shifting signed 32-bit value by 31 bits is implementation-defined behaviour. See condition at line 1826.  [shiftTooManyBitsSigned]

  appl_writel(pcie, (1 << irq), APPL_MSI_CTRL_1);
                     ^

[bhelgaas: commit log]
Link: https://lore.kernel.org/r/20210618160219.303092-1-jonathanh@nvidia.com
Fixes: c57247f940 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2021-06-28 18:26:46 -05:00
Vidya Sagar
c4bf1f25c6 PCI: tegra194: Fix host initialization during resume
Commit 275e88b06a ("PCI: tegra: Fix host link initialization") broke
host initialization during resume as it misses out calling the API
dw_pcie_setup_rc() which is required for host and MSI initialization.

Link: https://lore.kernel.org/r/20210504172157.29712-1-vidyas@nvidia.com
Fixes: 275e88b06a ("PCI: tegra: Fix host link initialization")
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2021-06-24 17:45:23 -05:00
Richard Zhu
d2ce69ca25 PCI: imx6: Enable PHY internal regulator when supplied >3V
The i.MX8MQ PCIe PHY needs 1.8V in default but can be supplied by either a
1.8V or a 3.3V regulator.

The "vph-supply" DT property tells us which external regulator supplies the
PHY. If that regulator supplies anything over 3V, enable the PHY's internal
3.3V-to-1.8V regulator.

Link: https://lore.kernel.org/r/1622771269-13844-3-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2021-06-24 14:50:34 -05:00
Richard Zhu
7a289a164c PCI: imx6: Limit DBI register length for imx6qp PCIe
Define the length of the DBI registers and limit config space to its
length. This makes sure that the kernel does not access registers beyond
that point that otherwise would lead to an abort on the i.MX 6QuadPlus.

See commit 075af61c19 ("PCI: imx6: Limit DBI register length") that
resolves a similar issue on the i.MX 6Quad PCIe.

Link: https://lore.kernel.org/r/1613789388-2495-2-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
2021-06-24 14:50:34 -05:00
Zhen Lei
fd6403756f PCI: imx6: Remove imx6_pcie_probe() redundant error message
When devm_ioremap_resource() fails, __devm_ioremap_resource() prints an
error message including the device name, failure cause, and possibly
resource information.

Remove the error message from imx6_pcie_probe() since it's redundant.

Link: https://lore.kernel.org/r/20210511114547.5601-1-thunder.leizhen@huawei.com
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
Acked-by: Richard Zhu <hongxing.zhu@nxp.com>
2021-06-24 14:49:46 -05:00
Martin Blumenstingl
655832d12f PCI: intel-gw: Fix INTx enable
The legacy PCI interrupt lines need to be enabled using PCIE_APP_IRNEN bits
13 (INTA), 14 (INTB), 15 (INTC) and 16 (INTD). The old code however was
taking (for example) "13" as raw value instead of taking BIT(13).  Define
the legacy PCI interrupt bits using the BIT() macro and then use these in
PCIE_APP_IRN_INT.

Link: https://lore.kernel.org/r/20210106135540.48420-1-martin.blumenstingl@googlemail.com
Fixes: ed22aaaede ("PCI: dwc: intel: PCIe RC controller driver")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rahul Tanwar <rtanwar@maxlinear.com>
2021-06-24 14:44:13 -05:00
Jon Hunter
a512360f45 PCI: tegra194: Fix MCFG quirk build regressions
7f10074474 ("PCI: tegra: Add Tegra194 MCFG quirks for ECAM errata")
caused a few build regressions:

  - 7f10074474 removed the Makefile rule for CONFIG_PCIE_TEGRA194, so
    pcie-tegra.c can no longer be built as a module.  Restore that rule.

  - 7f10074474 added "#ifdef CONFIG_PCIE_TEGRA194" around the native
    driver, but that's only set when the driver is built-in (for a module,
    CONFIG_PCIE_TEGRA194_MODULE is defined).

    The ACPI quirk is completely independent of the rest of the native
    driver, so move the quirk to its own file and remove the #ifdef in the
    native driver.

  - 7f10074474 added symbols that are always defined but used only when
    CONFIG_PCIEASPM, which causes warnings when CONFIG_PCIEASPM is not set:

      drivers/pci/controller/dwc/pcie-tegra194.c:259:18: warning: ‘event_cntr_data_offset’ defined but not used [-Wunused-const-variable=]
      drivers/pci/controller/dwc/pcie-tegra194.c:250:18: warning: ‘event_cntr_ctrl_offset’ defined but not used [-Wunused-const-variable=]
      drivers/pci/controller/dwc/pcie-tegra194.c:243:27: warning: ‘pcie_gen_freq’ defined but not used [-Wunused-const-variable=]

Fixes: 7f10074474 ("PCI: tegra: Add Tegra194 MCFG quirks for ECAM errata")
Link: https://lore.kernel.org/r/20210610064134.336781-1-jonathanh@nvidia.com
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2021-06-18 10:32:34 -05:00
Linus Torvalds
57151b502c pci-v5.13-changes
-----BEGIN PGP SIGNATURE-----
 
 iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAmCRp48UHGJoZWxnYWFz
 QGdvb2dsZS5jb20ACgkQWYigwDrT+vwsVRAAsIYueNKzZczpkeQwHigYzf4HLdKm
 yyT2c/Zlj9REAUOe7ApkowVAJWiMGDJP0J361KIluAGvAxnkMP1V6WlVdByorYd0
 CrXc/UhD//cs+3QDo4SmJRHyL8q5QQTDa8Z/8seVJUYTR/t5OhSpMOuEJPhpeQ1s
 nqUk0yWNJRoN6wn6T/7KqgYEvPhARXo9epuWy5MNPZ5f8E7SRi/QG/6hP8/YOLpK
 A+8beIOX5LAvUJaXxEovwv5UQnSUkeZTGDyRietQYE6xXNeHPKCvZ7vDjjSE7NOW
 mIodD6JcG3n/riYV3sMA5PKDZgsPI3P/qJU6Y6vWBBYOaO/kQX/c7CZ+M2bcZay4
 mh1dW0vOqoTy/pAVwQB2aq08Rrg2SAskpNdeyzduXllmuTyuwCMPXzG4RKmbQ8I1
 qMFb8qOyNulRAWcTKgSMKByEQYASQsFA5yShtaba6h0+vqrseuP6hchBKKOEan8F
 9THTI3ZflKwRvGjkI0MDbp0z0+wPYmNhrcZDpAJ3bEltw58E8TL/9aBtuhajmo8+
 wJ64mZclFuMmSyhsfkAXOvjeKXMlEBaw7vinZGbcACmv4ZGI0MV7r4vVYQbQltcy
 myzB6xJxcWB8N07UpKpUbsGMb9JjTUPlaT36eZNvUZQDntrE1ljt8RSq3nphDrcD
 KmBRU8ru74I2RE0=
 =WvTD
 -----END PGP SIGNATURE-----

Merge tag 'pci-v5.13-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull pci updates from Bjorn Helgaas:
 "Enumeration:
   - Release OF node when pci_scan_device() fails (Dmitry Baryshkov)
   - Add pci_disable_parity() (Bjorn Helgaas)
   - Disable Mellanox Tavor parity reporting (Heiner Kallweit)
   - Disable N2100 r8169 parity reporting (Heiner Kallweit)
   - Fix RCiEP device to RCEC association (Qiuxu Zhuo)
   - Convert sysfs "config", "rom", "reset", "label", "index",
     "acpi_index" to static attributes to help fix races in device
     enumeration (Krzysztof Wilczyński)
   - Convert sysfs "vpd" to static attribute (Heiner Kallweit, Krzysztof
     Wilczyński)
   - Use sysfs_emit() in "show" functions (Krzysztof Wilczyński)
   - Remove unused alloc_pci_root_info() return value (Krzysztof
     Wilczyński)

  PCI device hotplug:
   - Fix acpiphp reference count leak (Feilong Lin)

  Power management:
   - Fix acpi_pci_set_power_state() debug message (Rafael J. Wysocki)
   - Fix runtime PM imbalance (Dinghao Liu)

  Virtualization:
   - Increase delay after FLR to work around Intel DC P4510 NVMe erratum
     (Raphael Norwitz)

  MSI:
   - Convert rcar, tegra, xilinx to MSI domains (Marc Zyngier)
   - For rcar, xilinx, use controller address as MSI doorbell (Marc
     Zyngier)
   - Remove unused hv msi_controller struct (Marc Zyngier)
   - Remove unused PCI core msi_controller support (Marc Zyngier)
   - Remove struct msi_controller altogether (Marc Zyngier)
   - Remove unused default_teardown_msi_irqs() (Marc Zyngier)
   - Let host bridges declare their reliance on MSI domains (Marc
     Zyngier)
   - Make pci_host_common_probe() declare its reliance on MSI domains
     (Marc Zyngier)
   - Advertise mediatek lack of built-in MSI handling (Thomas Gleixner)
   - Document ways of ending up with NO_MSI (Marc Zyngier)
   - Refactor HT advertising of NO_MSI flag (Marc Zyngier)

  VPD:
   - Remove obsolete Broadcom NIC VPD length-limiting quirk (Heiner
     Kallweit)
   - Remove sysfs VPD size checking dead code (Heiner Kallweit)
   - Convert VPF sysfs file to static attribute (Heiner Kallweit)
   - Remove unnecessary pci_set_vpd_size() (Heiner Kallweit)
   - Tone down "missing VPD" message (Heiner Kallweit)

  Endpoint framework:
   - Fix NULL pointer dereference when epc_features not implemented
     (Shradha Todi)
   - Add missing destroy_workqueue() in endpoint test (Yang Yingliang)

  Amazon Annapurna Labs PCIe controller driver:
   - Fix compile testing without CONFIG_PCI_ECAM (Arnd Bergmann)
   - Fix "no symbols" warnings when compile testing with
     CONFIG_TRIM_UNUSED_KSYMS (Arnd Bergmann)

  APM X-Gene PCIe controller driver:
   - Fix cfg resource mapping regression (Dejin Zheng)

  Broadcom iProc PCIe controller driver:
   - Return zero for success of iproc_msi_irq_domain_alloc() (Pali
     Rohár)

  Broadcom STB PCIe controller driver:
   - Add reset_control_rearm() stub for !CONFIG_RESET_CONTROLLER (Jim
     Quinlan)
   - Fix use of BCM7216 reset controller (Jim Quinlan)
   - Use reset/rearm for Broadcom STB pulse reset instead of
     deassert/assert (Jim Quinlan)
   - Fix brcm_pcie_probe() error return for unsupported revision (Wei
     Yongjun)

  Cavium ThunderX PCIe controller driver:
   - Fix compile testing (Arnd Bergmann)
   - Fix "no symbols" warnings when compile testing with
     CONFIG_TRIM_UNUSED_KSYMS (Arnd Bergmann)

  Freescale Layerscape PCIe controller driver:
   - Fix ls_pcie_ep_probe() syntax error (comma for semicolon)
     (Krzysztof Wilczyński)
   - Remove layerscape-gen4 dependencies on OF and ARM64, add dependency
     on ARCH_LAYERSCAPE (Geert Uytterhoeven)

  HiSilicon HIP PCIe controller driver:
   - Remove obsolete HiSilicon PCIe DT description (Dongdong Liu)

  Intel Gateway PCIe controller driver:
   - Remove unused pcie_app_rd() (Jiapeng Chong)

  Intel VMD host bridge driver:
   - Program IRTE with Requester ID of VMD endpoint, not child device
     (Jon Derrick)
   - Disable VMD MSI-X remapping when possible so children can use more
     MSI-X vectors (Jon Derrick)

  MediaTek PCIe controller driver:
   - Configure FC and FTS for functions other than 0 (Ryder Lee)
   - Add YAML schema for MediaTek (Jianjun Wang)
   - Export pci_pio_to_address() for module use (Jianjun Wang)
   - Add MediaTek MT8192 PCIe controller driver (Jianjun Wang)
   - Add MediaTek MT8192 INTx support (Jianjun Wang)
   - Add MediaTek MT8192 MSI support (Jianjun Wang)
   - Add MediaTek MT8192 system power management support (Jianjun Wang)
   - Add missing MODULE_DEVICE_TABLE (Qiheng Lin)

  Microchip PolarFlare PCIe controller driver:
   - Make several symbols static (Wei Yongjun)

  NVIDIA Tegra PCIe controller driver:
   - Add MCFG quirks for Tegra194 ECAM errata (Vidya Sagar)
   - Make several symbols const (Rikard Falkeborn)
   - Fix Kconfig host/endpoint typo (Wesley Sheng)

  SiFive FU740 PCIe controller driver:
   - Add pcie_aux clock to prci driver (Greentime Hu)
   - Use reset-simple in prci driver for PCIe (Greentime Hu)
   - Add SiFive FU740 PCIe host controller driver and DT binding (Paul
     Walmsley, Greentime Hu)

  Synopsys DesignWare PCIe controller driver:
   - Move MSI Receiver init to dw_pcie_host_init() so it is
     re-initialized along with the RC in resume (Jisheng Zhang)
   - Move iATU detection earlier to fix regression (Hou Zhiqiang)

  TI J721E PCIe driver:
   - Add DT binding and TI j721e support for refclk to PCIe connector
     (Kishon Vijay Abraham I)
   - Add host mode and endpoint mode DT bindings for TI AM64 SoC (Kishon
     Vijay Abraham I)

  TI Keystone PCIe controller driver:
   - Use generic config accessors for TI AM65x (K3) to fix regression
     (Kishon Vijay Abraham I)

  Xilinx NWL PCIe controller driver:
   - Add support for coherent PCIe DMA traffic using CCI (Bharat Kumar
     Gogada)
   - Add optional "dma-coherent" DT property (Bharat Kumar Gogada)

  Miscellaneous:
   - Fix kernel-doc warnings (Krzysztof Wilczyński)
   - Remove unused MicroGate SyncLink device IDs (Jiri Slaby)
   - Remove redundant dev_err() for devm_ioremap_resource() failure
     (Chen Hui)
   - Remove redundant initialization (Colin Ian King)
   - Drop redundant dev_err() for platform_get_irq() errors (Krzysztof
     Wilczyński)"

* tag 'pci-v5.13-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (98 commits)
  riscv: dts: Add PCIe support for the SiFive FU740-C000 SoC
  PCI: fu740: Add SiFive FU740 PCIe host controller driver
  dt-bindings: PCI: Add SiFive FU740 PCIe host controller
  MAINTAINERS: Add maintainers for SiFive FU740 PCIe driver
  clk: sifive: Use reset-simple in prci driver for PCIe driver
  clk: sifive: Add pcie_aux clock in prci driver for PCIe driver
  PCI: brcmstb: Use reset/rearm instead of deassert/assert
  ata: ahci_brcm: Fix use of BCM7216 reset controller
  reset: add missing empty function reset_control_rearm()
  PCI: Allow VPD access for QLogic ISP2722
  PCI/VPD: Add helper pci_get_func0_dev()
  PCI/VPD: Remove pci_vpd_find_tag() SRDT handling
  PCI/VPD: Remove pci_vpd_find_tag() 'offset' argument
  PCI/VPD: Change pci_vpd_init() return type to void
  PCI/VPD: Make missing VPD message less alarming
  PCI/VPD: Remove pci_set_vpd_size()
  x86/PCI: Remove unused alloc_pci_root_info() return value
  MAINTAINERS: Add Jianjun Wang as MediaTek PCI co-maintainer
  PCI: mediatek-gen3: Add system PM support
  PCI: mediatek-gen3: Add MSI support
  ...
2021-05-05 13:24:11 -07:00
Bjorn Helgaas
882862aaac Merge branch 'pci/tegra'
- Add MCFG quirks for Tegra194 ECAM errata (Vidya Sagar)

* pci/tegra:
  PCI: tegra: Add Tegra194 MCFG quirks for ECAM errata
2021-05-04 10:43:32 -05:00
Bjorn Helgaas
5b8dafa1e3 Merge branch 'remotes/lorenzo/pci/tegra'
- Make several tegra symbols const (Rikard Falkeborn)

- Fix tegra Kconfig host/endpoint typo (Wesley Sheng)

- Fix runtime PM imbalance (Dinghao Liu)

* remotes/lorenzo/pci/tegra:
  PCI: tegra: Fix runtime PM imbalance in pex_ep_event_pex_rst_deassert()
  PCI: tegra: Fix typo for PCIe endpoint mode in Tegra194
  PCI: tegra: Constify static structs
2021-05-04 10:43:29 -05:00
Bjorn Helgaas
98d771eb3d Merge branch 'remotes/lorenzo/pci/risc-v'
- sifive: Add pcie_aux clock to prci driver (Greentime Hu)

- sifive: Use reset-simple in prci driver for PCIe (Greentime Hu)

- Add SiFive FU740 PCIe host controller driver and DT binding (Paul
  Walmsley, Greentime Hu)

* remotes/lorenzo/pci/risc-v:
  riscv: dts: Add PCIe support for the SiFive FU740-C000 SoC
  PCI: fu740: Add SiFive FU740 PCIe host controller driver
  dt-bindings: PCI: Add SiFive FU740 PCIe host controller
  MAINTAINERS: Add maintainers for SiFive FU740 PCIe driver
  clk: sifive: Use reset-simple in prci driver for PCIe driver
  clk: sifive: Add pcie_aux clock in prci driver for PCIe driver
2021-05-04 10:43:28 -05:00
Bjorn Helgaas
586fbe90f8 Merge branch 'remotes/lorenzo/pci/layerscape'
- Fix ls_pcie_ep_probe() syntax error (comma for semicolon) (Krzysztof
  Wilczyński)

* remotes/lorenzo/pci/layerscape:
  PCI: layerscape: Correct syntax by changing comma to semicolon
2021-05-04 10:43:27 -05:00
Bjorn Helgaas
a5166a194e Merge branch 'remotes/lorenzo/pci/dwc'
- Use generic config accessors for TI AM65x (K3) to fix regression (Kishon
  Vijay Abraham I)

- Move MSI Receiver init to dw_pcie_host_init() so it is re-initialized
  along with the RC in resume (Jisheng Zhang)

- Remove unused pcie_app_rd() (Jiapeng Chong)

- Move iATU detection earlier to fix regression (Hou Zhiqiang)

* remotes/lorenzo/pci/dwc:
  PCI: dwc: Move iATU detection earlier
  PCI: dwc/intel-gw: Remove unused function
  PCI: dwc: Move dw_pcie_msi_init() to dw_pcie_setup_rc()
  PCI: keystone: Let AM65 use the pci_ops defined in pcie-designware-host.c
2021-05-04 10:43:26 -05:00
Bjorn Helgaas
ccfc1d5570 Merge branch 'pci/misc'
- Fix compile testing of al driver without CONFIG_PCI_ECAM (Arnd Bergmann)

- Fix compile testing of thunder drivers (Arnd Bergmann)

- Fix "no symbols" warnings when compile testing al, thunder driver with
  CONFIG_TRIM_UNUSED_KSYMS (Arnd Bergmann)

- Remove unused MicroGate SyncLink device IDs (Jiri Slaby)

- Remove unused alloc_pci_root_info() return value (Krzysztof Wilczyński)

* pci/misc:
  x86/PCI: Remove unused alloc_pci_root_info() return value
  PCI: Remove MicroGate SyncLink device IDs
  PCI: Avoid building empty drivers
  PCI: thunder: Fix compile testing
  PCI: al: Select CONFIG_PCI_ECAM
2021-05-04 10:43:25 -05:00
Paul Walmsley
e7e21b3a33 PCI: fu740: Add SiFive FU740 PCIe host controller driver
Add driver for the SiFive FU740 PCIe host controller.
This controller is based on the DesignWare PCIe core.

Co-developed-by: Henry Styles <hes@sifive.com>
Co-developed-by: Erik Danie <erik.danie@sifive.com>
Co-developed-by: Greentime Hu <greentime.hu@sifive.com>
Link: https://lore.kernel.org/r/20210504105940.100004-6-greentime.hu@sifive.com
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Henry Styles <hes@sifive.com>
Signed-off-by: Erik Danie <erik.danie@sifive.com>
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2021-05-04 14:58:22 +01:00
Hou Zhiqiang
8bcca26585 PCI: dwc: Move iATU detection earlier
dw_pcie_ep_init() depends on the detected iATU region numbers to allocate
the in/outbound window management bitmap.  It fails after 281f1f99cf
("PCI: dwc: Detect number of iATU windows").

Move the iATU region detection into a new function, move the detection to
the very beginning of dw_pcie_host_init() and dw_pcie_ep_init().  Also
remove it from the dw_pcie_setup(), since it's more like a software
initialization step than hardware setup.

Link: https://lore.kernel.org/r/20210125044803.4310-1-Zhiqiang.Hou@nxp.com
Link: https://lore.kernel.org/linux-pci/20210407131255.702054-1-dmitry.baryshkov@linaro.org
Link: https://lore.kernel.org/r/20210413142219.2301430-1-dmitry.baryshkov@linaro.org
Fixes: 281f1f99cf ("PCI: dwc: Detect number of iATU windows")
Tested-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[DB: moved dw_pcie_iatu_detect to happen after host_init callback]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Cc: stable@vger.kernel.org	# v5.11+
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
2021-04-29 17:05:59 +01:00
Jiapeng Chong
7d499169f7 PCI: dwc/intel-gw: Remove unused function
Fix the following clang warning:

drivers/pci/controller/dwc/pcie-intel-gw.c:84:19: warning: unused
function 'pcie_app_rd' [-Wunused-function].

Link: https://lore.kernel.org/r/1618475577-99198-1-git-send-email-jiapeng.chong@linux.alibaba.com
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
2021-04-29 17:05:59 +01:00
Jisheng Zhang
294353d950 PCI: dwc: Move dw_pcie_msi_init() to dw_pcie_setup_rc()
If the host which makes use of IP's integrated MSI Receiver losts
power during suspend, we need to reinit the RC and MSI Receiver in
resume. But after we move dw_pcie_msi_init() into the core, we have no
API to do so. Usually the dwc users need to call dw_pcie_setup_rc() to
reinit the RC, we can solve this problem by moving dw_pcie_msi_init()
to dw_pcie_setup_rc().

Link: https://lore.kernel.org/r/20210325152604.6e79deba@xhacker.debian
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2021-04-29 17:05:58 +01:00
Vidya Sagar
7f10074474 PCI: tegra: Add Tegra194 MCFG quirks for ECAM errata
The PCIe controller in Tegra194 SoC is not ECAM-compliant.  With the
current hardware design, ECAM can be enabled only for one controller (the
C5 controller) with bus numbers starting from 160 instead of 0. A different
approach is taken to avoid this abnormal way of enabling ECAM for just one
controller but to enable configuration space access for all the other
controllers. In this approach, ops are added through MCFG quirk mechanism
which access the configuration spaces by dynamically programming iATU
(internal AddressTranslation Unit) to generate respective configuration
accesses just like the way it is done in DesignWare core sub-system.

This issue is specific to Tegra194 and it would be fixed in the future
generations of Tegra SoCs.

Link: https://lore.kernel.org/r/20210416134537.19474-1-vidyas@nvidia.com
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2021-04-16 11:34:17 -05:00
Dinghao Liu
5859c926d1 PCI: tegra: Fix runtime PM imbalance in pex_ep_event_pex_rst_deassert()
pm_runtime_get_sync() will increase the runtime PM counter
even it returns an error. Thus a pairing decrement is needed
to prevent refcount leak. Fix this by replacing this API with
pm_runtime_resume_and_get(), which will not change the runtime
PM counter on error.

Link: https://lore.kernel.org/r/20210408072700.15791-1-dinghao.liu@zju.edu.cn
Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>
2021-04-08 18:10:35 +01:00
Wesley Sheng
10739e2a5e PCI: tegra: Fix typo for PCIe endpoint mode in Tegra194
In config PCIE_TEGRA194_EP the mode incorrectly is referred to as
host mode. Fix it.

Link: https://lore.kernel.org/r/20201231032539.22322-1-wesley.sheng@amd.com
Signed-off-by: Wesley Sheng <wesley.sheng@amd.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
Acked-by: Vidya Sagar <vidyas@nvidia.com>
2021-03-22 18:18:30 +00:00
Krzysztof Wilczyński
1b7996a528 PCI: layerscape: Correct syntax by changing comma to semicolon
Replace command with a semicolon to correct syntax and to prevent
potential unspecified behaviour and/or unintended side effects.

Related:
  https://lore.kernel.org/linux-pci/20201216131944.14990-1-zhengyongjun3@huawei.com/

Co-authored-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Link: https://lore.kernel.org/r/20210311033745.1547044-1-kw@linux.com
Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Roy Zang <roy.zang@nxp.com>
2021-03-22 17:24:19 +00:00
Kishon Vijay Abraham I
3d0b2a3a87 PCI: keystone: Let AM65 use the pci_ops defined in pcie-designware-host.c
Both TI's AM65x (K3) and TI's K2 PCIe driver are implemented in
pci-keystone. However Only K2 PCIe driver should use it's own pci_ops
for configuration space accesses. But commit 10a797c6e5
("PCI: dwc: keystone: Use pci_ops for config space accessors") used
custom pci_ops for both AM65x and K2. This breaks configuration space
access for AM65x platform. Fix it here.

Link: https://lore.kernel.org/r/20210317131518.11040-1-kishon@ti.com
Fixes: 10a797c6e5 ("PCI: dwc: keystone: Use pci_ops for config space accessors")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
Cc: <stable@vger.kernel.org> # v5.10
2021-03-22 14:47:21 +00:00
Rikard Falkeborn
d895ce7030 PCI: tegra: Constify static structs
The only usage of them is to assign their address to the 'ops' field in
the pcie_port and the dw_pcie_ep structs, both which are pointers to
const. Make them const to allow the compiler to put them in read-only
memory.

Link: https://lore.kernel.org/r/20210207221604.48910-1-rikard.falkeborn@gmail.com
Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
2021-03-22 12:56:47 +00:00
Krzysztof Wilczyński
43395d9e09 PCI: Fix kernel-doc errors
Fix kernel-doc formatting errors, function names that don't match the doc,
and some missing parameter documentation.  These are reported by:

  make W=1 drivers/pci/

No functional change intended.

[bhelgaas: squashed into one patch since this only changes comments]
Link: https://lore.kernel.org/r/20210311001724.423356-1-kw@linux.com
Link: https://lore.kernel.org/r/20210311001724.423356-2-kw@linux.com
Link: https://lore.kernel.org/r/20210311001724.423356-3-kw@linux.com
Link: https://lore.kernel.org/r/20210311001724.423356-4-kw@linux.com
Link: https://lore.kernel.org/r/20210311001724.423356-5-kw@linux.com
Link: https://lore.kernel.org/r/20210311001724.423356-6-kw@linux.com
Link: https://lore.kernel.org/r/20210311001724.423356-7-kw@linux.com
Link: https://lore.kernel.org/r/20210311001724.423356-8-kw@linux.com
Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2021-03-11 17:37:20 -06:00
Arnd Bergmann
6e5a1fff90 PCI: Avoid building empty drivers
There are harmless warnings when compile testing the kernel with
CONFIG_TRIM_UNUSED_KSYMS:

  drivers/pci/controller/dwc/pcie-al.o: no symbols
  drivers/pci/controller/pci-thunder-ecam.o: no symbols
  drivers/pci/controller/pci-thunder-pem.o: no symbols

The problem here is that the host drivers get built even when the
configuration symbols are all disabled, as they pretend to not be drivers
but are silently enabled because of the promise that ACPI-based systems
need no drivers.

Add back the normal symbols to have these drivers built, and change the
logic to otherwise only build them when both CONFIG_PCI_QUIRKS and
CONFIG_ACPI are enabled.

As a side-effect, this enables compile-testing the drivers on other
architectures, which in turn needs the acpi_get_rc_resources() function to
be defined.

Link: https://lore.kernel.org/r/20210308152501.2135937-3-arnd@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Robert Richter <rric@kernel.org>
2021-03-11 15:07:50 -06:00
Arnd Bergmann
59521c3c4b PCI: al: Select CONFIG_PCI_ECAM
Compile-testing this driver without ECAM support results in a link failure:

  ld.lld: error: undefined symbol: pci_ecam_map_bus
  >>> referenced by pcie-al.c
  >>>               pci/controller/dwc/pcie-al.o:(al_pcie_map_bus) in archive drivers/built-in.a

Select CONFIG_ECAM like the other drivers do.

Link: https://lore.kernel.org/r/20210308152501.2135937-1-arnd@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
2021-03-11 15:07:41 -06:00
Tony Lindgren
e259c2926c PCI: pci-dra7xx: Prepare for deferred probe with module_platform_driver
After updating pci-dra7xx driver to probe with ti-sysc and genpd, I
noticed that dra7xx_pcie_probe() would not run if a power-domains property
was configured for the interconnect target module.

Turns out that module_platform_driver_probe uses platform_driver_probe(),
while builtin_platform_driver uses platform_driver_register().

Only platform_driver_register() works for deferred probe as noted in the
comments for __platform_driver_probe() in drivers/base/platform.c with a
line saying "Note that this is incompatible with deferred probing".

With module_platform_driver_probe, we have platform_driver_probe() produce
-ENODEV error at device_initcall() level, and no further attempts are done.
Let's fix this by using module_platform_driver instead.

Note this is not an issue currently as we probe devices with simple-bus,
and only is needed as we start probing the device with ti-sysc, or when
probed with simple-pm-bus.

Note that we must now also remove __init for probe related functions to
avoid a section mismatch warning.

Cc: linux-pci@vger.kernel.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:01:00 +02:00
Bjorn Helgaas
e18fb64b79 Merge branch 'remotes/lorenzo/pci/misc'
- Remove IRQ handler & data together for altera, brcmstb, dwc (Martin
  Kaiser)

- Fix xgene race in installing chained IRQ handler (Martin Kaiser)

- Drop PCIE_RCAR config option (replaced by PCIE_RCAR_HOST) (Lad Prabhakar)

- Fix xgene comment about CRS vs CRS SV (Bjorn Helgaas)

* remotes/lorenzo/pci/misc:
  PCI: hv: Fix typo
  PCI: xgene: Fix CRS SV comment
  PCI: brcmstb: Remove chained IRQ handler and data in one go
  PCI: Drop PCIE_RCAR config option
  PCI: xgene-msi: Fix race in installing chained irq handler
  PCI: dwc: Remove IRQ handler and data in one go
  PCI: altera-msi: Remove IRQ handler and data in one go
2021-02-24 14:59:25 -06:00
Bjorn Helgaas
9da5366938 Merge branch 'pci/qcom'
- Add support for SM8250 PCIe SF TBU clock (Dmitry Baryshkov)

- Use PHY_REFCLK_USE_PAD only for qcom ipq8064 (Ansuel Smith)

* pci/qcom:
  PCI: qcom: Use PHY_REFCLK_USE_PAD only for ipq8064
  PCI: qcom: Add support for ddrss_sf_tbu clock
  dt-bindings: PCI: qcom: Document ddrss_sf_tbu clock for sm8250
2021-02-24 14:59:23 -06:00
Bjorn Helgaas
b994a66a9d Merge branch 'pci/layerscape'
- Add Layerscape LX2160A rev2 endpoint mode support (Hou Zhiqiang)

- Convert layerscape to builtin_platform_driver() (Michael Walle)

* pci/layerscape:
  PCI: layerscape: Convert to builtin_platform_driver()
  PCI: layerscape: Add LX2160A rev2 EP mode support
  dt-bindings: PCI: layerscape: Add LX2160A rev2 compatible strings
2021-02-24 14:59:22 -06:00