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Code

drm/display: dp: change drm_dp_dpcd_read_link_status() return value

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drm_dp_dpcd_read_link_status() follows the "return error code or number
of bytes read" protocol, with the code returning less bytes than
requested in case of some errors. However most of the drivers
interpreted that as "return error code in case of any error". Switch
drm_dp_dpcd_read_link_status() to drm_dp_dpcd_read_data() and make it
follow that protocol too.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250324-drm-rework-dpcd-access-v4-2-e80ff89593df@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
This commit is contained in:
Dmitry Baryshkov 2025-03-24 13:51:20 +02:00 committed by Dmitry Baryshkov
parent d8343e1156
commit fcbb93f1e4
7 changed files with 28 additions and 43 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/gpu/drm/amd/amdgpu/atombios_dp.c
View File

@ -458,8 +458,8 @@ bool amdgpu_atombios_dp_needs_link_train(struct amdgpu_connector *amdgpu_connect
u8 link_status[DP_LINK_STATUS_SIZE]; u8 link_status[DP_LINK_STATUS_SIZE];
struct amdgpu_connector_atom_dig *dig = amdgpu_connector->con_priv; struct amdgpu_connector_atom_dig *dig = amdgpu_connector->con_priv;
if (drm_dp_dpcd_read_link_status(&amdgpu_connector->ddc_bus->aux, link_status) if (drm_dp_dpcd_read_link_status(&amdgpu_connector->ddc_bus->aux,
<= 0) link_status) < 0)
return false; return false;
if (drm_dp_channel_eq_ok(link_status, dig->dp_lane_count)) if (drm_dp_channel_eq_ok(link_status, dig->dp_lane_count))
return false; return false;
@ -616,7 +616,7 @@ amdgpu_atombios_dp_link_train_cr(struct amdgpu_atombios_dp_link_train_info *dp_i
drm_dp_link_train_clock_recovery_delay(dp_info->aux, dp_info->dpcd); drm_dp_link_train_clock_recovery_delay(dp_info->aux, dp_info->dpcd);
if (drm_dp_dpcd_read_link_status(dp_info->aux, if (drm_dp_dpcd_read_link_status(dp_info->aux,
dp_info->link_status) <= 0) { dp_info->link_status) < 0) {
DRM_ERROR("displayport link status failed\n"); DRM_ERROR("displayport link status failed\n");
break; break;
} }
@ -681,7 +681,7 @@ amdgpu_atombios_dp_link_train_ce(struct amdgpu_atombios_dp_link_train_info *dp_i
drm_dp_link_train_channel_eq_delay(dp_info->aux, dp_info->dpcd); drm_dp_link_train_channel_eq_delay(dp_info->aux, dp_info->dpcd);
if (drm_dp_dpcd_read_link_status(dp_info->aux, if (drm_dp_dpcd_read_link_status(dp_info->aux,
dp_info->link_status) <= 0) { dp_info->link_status) < 0) {
DRM_ERROR("displayport link status failed\n"); DRM_ERROR("displayport link status failed\n");
break; break;
} }

2
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
View File

@ -2306,7 +2306,7 @@ static int cdns_mhdp_update_link_status(struct cdns_mhdp_device *mhdp)
* If everything looks fine, just return, as we don't handle * If everything looks fine, just return, as we don't handle
* DP IRQs. * DP IRQs.
*/ */
if (ret > 0 && if (!ret &&
drm_dp_channel_eq_ok(status, mhdp->link.num_lanes) && drm_dp_channel_eq_ok(status, mhdp->link.num_lanes) &&
drm_dp_clock_recovery_ok(status, mhdp->link.num_lanes)) drm_dp_clock_recovery_ok(status, mhdp->link.num_lanes))
goto out; goto out;

7
drivers/gpu/drm/display/drm_dp_helper.c
View File

@ -778,14 +778,13 @@ EXPORT_SYMBOL(drm_dp_dpcd_write);
* @aux: DisplayPort AUX channel * @aux: DisplayPort AUX channel
* @status: buffer to store the link status in (must be at least 6 bytes) * @status: buffer to store the link status in (must be at least 6 bytes)
* *
* Returns the number of bytes transferred on success or a negative error * Returns a negative error code on failure or 0 on success.
* code on failure.
*/ */
int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux, int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
u8 status[DP_LINK_STATUS_SIZE]) u8 status[DP_LINK_STATUS_SIZE])
{ {
return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status, return drm_dp_dpcd_read_data(aux, DP_LANE0_1_STATUS, status,
DP_LINK_STATUS_SIZE); DP_LINK_STATUS_SIZE);
} }
EXPORT_SYMBOL(drm_dp_dpcd_read_link_status); EXPORT_SYMBOL(drm_dp_dpcd_read_link_status);

4
drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c
View File

@ -188,7 +188,7 @@ static int hibmc_dp_link_training_cr(struct hibmc_dp_dev *dp)
drm_dp_link_train_clock_recovery_delay(&dp->aux, dp->dpcd); drm_dp_link_train_clock_recovery_delay(&dp->aux, dp->dpcd);
ret = drm_dp_dpcd_read_link_status(&dp->aux, lane_status); ret = drm_dp_dpcd_read_link_status(&dp->aux, lane_status);
if (ret != DP_LINK_STATUS_SIZE) { if (ret) {
drm_err(dp->dev, "Get lane status failed\n"); drm_err(dp->dev, "Get lane status failed\n");
return ret; return ret;
} }
@ -236,7 +236,7 @@ static int hibmc_dp_link_training_channel_eq(struct hibmc_dp_dev *dp)
drm_dp_link_train_channel_eq_delay(&dp->aux, dp->dpcd); drm_dp_link_train_channel_eq_delay(&dp->aux, dp->dpcd);
ret = drm_dp_dpcd_read_link_status(&dp->aux, lane_status); ret = drm_dp_dpcd_read_link_status(&dp->aux, lane_status);
if (ret != DP_LINK_STATUS_SIZE) { if (ret) {
drm_err(dp->dev, "get lane status failed\n"); drm_err(dp->dev, "get lane status failed\n");
break; break;
} }

24
drivers/gpu/drm/msm/dp/dp_ctrl.c
View File

@ -1099,20 +1099,6 @@ static bool msm_dp_ctrl_train_pattern_set(struct msm_dp_ctrl_private *ctrl,
return ret == 1; return ret == 1;
} }
static int msm_dp_ctrl_read_link_status(struct msm_dp_ctrl_private *ctrl,
u8 *link_status)
{
int ret = 0, len;
len = drm_dp_dpcd_read_link_status(ctrl->aux, link_status);
if (len != DP_LINK_STATUS_SIZE) {
DRM_ERROR("DP link status read failed, err: %d\n", len);
ret = -EINVAL;
}
return ret;
}
static int msm_dp_ctrl_link_train_1(struct msm_dp_ctrl_private *ctrl, static int msm_dp_ctrl_link_train_1(struct msm_dp_ctrl_private *ctrl,
int *training_step) int *training_step)
{ {
@ -1139,7 +1125,7 @@ static int msm_dp_ctrl_link_train_1(struct msm_dp_ctrl_private *ctrl,
for (tries = 0; tries < maximum_retries; tries++) { for (tries = 0; tries < maximum_retries; tries++) {
drm_dp_link_train_clock_recovery_delay(ctrl->aux, ctrl->panel->dpcd); drm_dp_link_train_clock_recovery_delay(ctrl->aux, ctrl->panel->dpcd);
ret = msm_dp_ctrl_read_link_status(ctrl, link_status); ret = drm_dp_dpcd_read_link_status(ctrl->aux, link_status);
if (ret) if (ret)
return ret; return ret;
@ -1251,7 +1237,7 @@ static int msm_dp_ctrl_link_train_2(struct msm_dp_ctrl_private *ctrl,
for (tries = 0; tries <= maximum_retries; tries++) { for (tries = 0; tries <= maximum_retries; tries++) {
drm_dp_link_train_channel_eq_delay(ctrl->aux, ctrl->panel->dpcd); drm_dp_link_train_channel_eq_delay(ctrl->aux, ctrl->panel->dpcd);
ret = msm_dp_ctrl_read_link_status(ctrl, link_status); ret = drm_dp_dpcd_read_link_status(ctrl->aux, link_status);
if (ret) if (ret)
return ret; return ret;
@ -1804,7 +1790,7 @@ static bool msm_dp_ctrl_channel_eq_ok(struct msm_dp_ctrl_private *ctrl)
u8 link_status[DP_LINK_STATUS_SIZE]; u8 link_status[DP_LINK_STATUS_SIZE];
int num_lanes = ctrl->link->link_params.num_lanes; int num_lanes = ctrl->link->link_params.num_lanes;
msm_dp_ctrl_read_link_status(ctrl, link_status); drm_dp_dpcd_read_link_status(ctrl->aux, link_status);
return drm_dp_channel_eq_ok(link_status, num_lanes); return drm_dp_channel_eq_ok(link_status, num_lanes);
} }
@ -1862,7 +1848,7 @@ int msm_dp_ctrl_on_link(struct msm_dp_ctrl *msm_dp_ctrl)
if (!msm_dp_catalog_link_is_connected(ctrl->catalog)) if (!msm_dp_catalog_link_is_connected(ctrl->catalog))
break; break;
msm_dp_ctrl_read_link_status(ctrl, link_status); drm_dp_dpcd_read_link_status(ctrl->aux, link_status);
rc = msm_dp_ctrl_link_rate_down_shift(ctrl); rc = msm_dp_ctrl_link_rate_down_shift(ctrl);
if (rc < 0) { /* already in RBR = 1.6G */ if (rc < 0) { /* already in RBR = 1.6G */
@ -1887,7 +1873,7 @@ int msm_dp_ctrl_on_link(struct msm_dp_ctrl *msm_dp_ctrl)
if (!msm_dp_catalog_link_is_connected(ctrl->catalog)) if (!msm_dp_catalog_link_is_connected(ctrl->catalog))
break; break;
msm_dp_ctrl_read_link_status(ctrl, link_status); drm_dp_dpcd_read_link_status(ctrl->aux, link_status);
if (!drm_dp_clock_recovery_ok(link_status, if (!drm_dp_clock_recovery_ok(link_status,
ctrl->link->link_params.num_lanes)) ctrl->link->link_params.num_lanes))

18
drivers/gpu/drm/msm/dp/dp_link.c
View File

@ -714,21 +714,21 @@ end:
static int msm_dp_link_parse_sink_status_field(struct msm_dp_link_private *link) static int msm_dp_link_parse_sink_status_field(struct msm_dp_link_private *link)
{ {
int len; int ret;
link->prev_sink_count = link->msm_dp_link.sink_count; link->prev_sink_count = link->msm_dp_link.sink_count;
len = drm_dp_read_sink_count(link->aux); ret = drm_dp_read_sink_count(link->aux);
if (len < 0) { if (ret < 0) {
DRM_ERROR("DP parse sink count failed\n"); DRM_ERROR("DP parse sink count failed\n");
return len; return ret;
} }
link->msm_dp_link.sink_count = len; link->msm_dp_link.sink_count = ret;
len = drm_dp_dpcd_read_link_status(link->aux, ret = drm_dp_dpcd_read_link_status(link->aux,
link->link_status); link->link_status);
if (len < DP_LINK_STATUS_SIZE) { if (ret < 0) {
DRM_ERROR("DP link status read failed\n"); DRM_ERROR("DP link status read failed\n");
return len; return ret;
} }
return msm_dp_link_parse_request(link); return msm_dp_link_parse_request(link);

8
drivers/gpu/drm/radeon/atombios_dp.c
View File

@ -501,8 +501,8 @@ bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector)
u8 link_status[DP_LINK_STATUS_SIZE]; u8 link_status[DP_LINK_STATUS_SIZE];
struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
if (drm_dp_dpcd_read_link_status(&radeon_connector->ddc_bus->aux, link_status) if (drm_dp_dpcd_read_link_status(&radeon_connector->ddc_bus->aux,
<= 0) link_status) < 0)
return false; return false;
if (drm_dp_channel_eq_ok(link_status, dig->dp_lane_count)) if (drm_dp_channel_eq_ok(link_status, dig->dp_lane_count))
return false; return false;
@ -678,7 +678,7 @@ static int radeon_dp_link_train_cr(struct radeon_dp_link_train_info *dp_info)
drm_dp_link_train_clock_recovery_delay(dp_info->aux, dp_info->dpcd); drm_dp_link_train_clock_recovery_delay(dp_info->aux, dp_info->dpcd);
if (drm_dp_dpcd_read_link_status(dp_info->aux, if (drm_dp_dpcd_read_link_status(dp_info->aux,
dp_info->link_status) <= 0) { dp_info->link_status) < 0) {
DRM_ERROR("displayport link status failed\n"); DRM_ERROR("displayport link status failed\n");
break; break;
} }
@ -741,7 +741,7 @@ static int radeon_dp_link_train_ce(struct radeon_dp_link_train_info *dp_info)
drm_dp_link_train_channel_eq_delay(dp_info->aux, dp_info->dpcd); drm_dp_link_train_channel_eq_delay(dp_info->aux, dp_info->dpcd);
if (drm_dp_dpcd_read_link_status(dp_info->aux, if (drm_dp_dpcd_read_link_status(dp_info->aux,
dp_info->link_status) <= 0) { dp_info->link_status) < 0) {
DRM_ERROR("displayport link status failed\n"); DRM_ERROR("displayport link status failed\n");
break; break;
} }