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irqchip/atmel-aic[5]: Fix incorrect lock guard conversion

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Commit b00bee8afa ("irqchip: Convert generic irqchip locking to guards")
replaced calls to irq_gc_lock_irq{save,restore}() with
guard(raw_spinlock_irq).

However, in irq-atmel-aic5.c and irq-atmel-aic.c, the xlate callback is
used in the early boot process, before interrupts are initially enabled.
As its destructor enables interrupts, this triggers the warning in
start_kernel():

    WARNING: CPU: 0 PID: 0 at init/main.c:1024 start_kernel+0x4d0/0x5dc
    Interrupts were enabled early

Fix this by using guard(raw_spinlock_irqsave) instead.

[ tglx: Folded the equivivalent fix for atmel-aic ]

Fixes: b00bee8afa ("irqchip: Convert generic irqchip locking to guards")
Signed-off-by: Edgar Bonet <bonet@grenoble.cnrs.fr>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/all/280dd506-e1fc-4d2e-bdc4-98dd9dca6138@grenoble.cnrs.fr
This commit is contained in:
Edgar Bonet 2025-08-14 14:59:42 +02:00 committed by Thomas Gleixner
parent 8f5ae30d69
commit c2bac68067
2 changed files with 2 additions and 2 deletions
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2
drivers/irqchip/irq-atmel-aic.c
View File

@ -188,7 +188,7 @@ static int aic_irq_domain_xlate(struct irq_domain *d,
gc = dgc->gc[idx]; gc = dgc->gc[idx];
guard(raw_spinlock_irq)(&gc->lock); guard(raw_spinlock_irqsave)(&gc->lock);
smr = irq_reg_readl(gc, AT91_AIC_SMR(*out_hwirq)); smr = irq_reg_readl(gc, AT91_AIC_SMR(*out_hwirq));
aic_common_set_priority(intspec[2], &smr); aic_common_set_priority(intspec[2], &smr);
irq_reg_writel(gc, smr, AT91_AIC_SMR(*out_hwirq)); irq_reg_writel(gc, smr, AT91_AIC_SMR(*out_hwirq));

2
drivers/irqchip/irq-atmel-aic5.c
View File

@ -279,7 +279,7 @@ static int aic5_irq_domain_xlate(struct irq_domain *d,
if (ret) if (ret)
return ret; return ret;
guard(raw_spinlock_irq)(&bgc->lock); guard(raw_spinlock_irqsave)(&bgc->lock);
irq_reg_writel(bgc, *out_hwirq, AT91_AIC5_SSR); irq_reg_writel(bgc, *out_hwirq, AT91_AIC5_SSR);
smr = irq_reg_readl(bgc, AT91_AIC5_SMR); smr = irq_reg_readl(bgc, AT91_AIC5_SMR);
aic_common_set_priority(intspec[2], &smr); aic_common_set_priority(intspec[2], &smr);