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accel/amdxdna: Add hardware context

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The hardware can be shared among multiple user applications. The
hardware resources are allocated/freed based on the request from
user application via driver IOCTLs.

DRM_IOCTL_AMDXDNA_CREATE_HWCTX
Allocate tile columns and create a hardware context structure to track the
usage and status of the resources. A hardware context ID is returned for
XDNA command execution.

DRM_IOCTL_AMDXDNA_DESTROY_HWCTX
Release hardware context based on its ID. The tile columns belong to
this hardware context will be reclaimed.

DRM_IOCTL_AMDXDNA_CONFIG_HWCTX
Config hardware context. Bind the hardware context to the required
resources.

Co-developed-by: Min Ma <min.ma@amd.com>
Signed-off-by: Min Ma <min.ma@amd.com>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Signed-off-by: Lizhi Hou <lizhi.hou@amd.com>
Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241118172942.2014541-6-lizhi.hou@amd.com
This commit is contained in:
Lizhi Hou
2024-11-18 09:29:37 -08:00
committed by Jeffrey Hugo
parent c88d3325ae
commit be462c97b7
10 changed files with 867 additions and 1 deletions
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131
include/uapi/drm/amdxdna_accel.h
View File

@@ -6,17 +6,148 @@
#ifndef _UAPI_AMDXDNA_ACCEL_H_
#define _UAPI_AMDXDNA_ACCEL_H_
#include <linux/stddef.h>
#include "drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
#define AMDXDNA_INVALID_CTX_HANDLE 0
enum amdxdna_device_type {
AMDXDNA_DEV_TYPE_UNKNOWN = -1,
AMDXDNA_DEV_TYPE_KMQ,
};
enum amdxdna_drm_ioctl_id {
DRM_AMDXDNA_CREATE_HWCTX,
DRM_AMDXDNA_DESTROY_HWCTX,
DRM_AMDXDNA_CONFIG_HWCTX,
};
/**
* struct qos_info - QoS information for driver.
* @gops: Giga operations per second.
* @fps: Frames per second.
* @dma_bandwidth: DMA bandwidtha.
* @latency: Frame response latency.
* @frame_exec_time: Frame execution time.
* @priority: Request priority.
*
* User program can provide QoS hints to driver.
*/
struct amdxdna_qos_info {
__u32 gops;
__u32 fps;
__u32 dma_bandwidth;
__u32 latency;
__u32 frame_exec_time;
__u32 priority;
};
/**
* struct amdxdna_drm_create_hwctx - Create hardware context.
* @ext: MBZ.
* @ext_flags: MBZ.
* @qos_p: Address of QoS info.
* @umq_bo: BO handle for user mode queue(UMQ).
* @log_buf_bo: BO handle for log buffer.
* @max_opc: Maximum operations per cycle.
* @num_tiles: Number of AIE tiles.
* @mem_size: Size of AIE tile memory.
* @umq_doorbell: Returned offset of doorbell associated with UMQ.
* @handle: Returned hardware context handle.
* @syncobj_handle: Returned syncobj handle for command completion.
*/
struct amdxdna_drm_create_hwctx {
__u64 ext;
__u64 ext_flags;
__u64 qos_p;
__u32 umq_bo;
__u32 log_buf_bo;
__u32 max_opc;
__u32 num_tiles;
__u32 mem_size;
__u32 umq_doorbell;
__u32 handle;
__u32 syncobj_handle;
};
/**
* struct amdxdna_drm_destroy_hwctx - Destroy hardware context.
* @handle: Hardware context handle.
* @pad: Structure padding.
*/
struct amdxdna_drm_destroy_hwctx {
__u32 handle;
__u32 pad;
};
/**
* struct amdxdna_cu_config - configuration for one CU
* @cu_bo: CU configuration buffer bo handle.
* @cu_func: Function of a CU.
* @pad: Structure padding.
*/
struct amdxdna_cu_config {
__u32 cu_bo;
__u8 cu_func;
__u8 pad[3];
};
/**
* struct amdxdna_hwctx_param_config_cu - configuration for CUs in hardware context
* @num_cus: Number of CUs to configure.
* @pad: Structure padding.
* @cu_configs: Array of CU configurations of struct amdxdna_cu_config.
*/
struct amdxdna_hwctx_param_config_cu {
__u16 num_cus;
__u16 pad[3];
struct amdxdna_cu_config cu_configs[] __counted_by(num_cus);
};
enum amdxdna_drm_config_hwctx_param {
DRM_AMDXDNA_HWCTX_CONFIG_CU,
DRM_AMDXDNA_HWCTX_ASSIGN_DBG_BUF,
DRM_AMDXDNA_HWCTX_REMOVE_DBG_BUF,
DRM_AMDXDNA_HWCTX_CONFIG_NUM
};
/**
* struct amdxdna_drm_config_hwctx - Configure hardware context.
* @handle: hardware context handle.
* @param_type: Value in enum amdxdna_drm_config_hwctx_param. Specifies the
* structure passed in via param_val.
* @param_val: A structure specified by the param_type struct member.
* @param_val_size: Size of the parameter buffer pointed to by the param_val.
* If param_val is not a pointer, driver can ignore this.
* @pad: Structure padding.
*
* Note: if the param_val is a pointer pointing to a buffer, the maximum size
* of the buffer is 4KiB(PAGE_SIZE).
*/
struct amdxdna_drm_config_hwctx {
__u32 handle;
__u32 param_type;
__u64 param_val;
__u32 param_val_size;
__u32 pad;
};
#define DRM_IOCTL_AMDXDNA_CREATE_HWCTX \
DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_CREATE_HWCTX, \
struct amdxdna_drm_create_hwctx)
#define DRM_IOCTL_AMDXDNA_DESTROY_HWCTX \
DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_DESTROY_HWCTX, \
struct amdxdna_drm_destroy_hwctx)
#define DRM_IOCTL_AMDXDNA_CONFIG_HWCTX \
DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_CONFIG_HWCTX, \
struct amdxdna_drm_config_hwctx)
#if defined(__cplusplus)
} /* extern c end */
#endif