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soc: fixes for 6.17, part 2

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These are mainly devicetree fixes for the rockchip and nxp platforms on
 arm64, addressing mistakes in the board and soc specific descriptions.
 In particular the newly added Rock 5T board required multiple bugfixes for
 PCIe and USB, while on the i.MX platform there are a number of regulator
 related fixes. The only other platforms with devicetree fixes are at91
 with a fixup for SD/MMC and a change to enable all the available UARTS
 on the Axiado reference board.
 
 Also on the at91 platform, a Kconfig change addresses a regression that
 stopped the DMA engine from working in 6.17-rc.
 
 Three drivers each have a simple bugfix, stopping incorrect behavior in
 op-tee firmware, the tee subsystem and the qualcomm mdt_loader.
 
 Two trivial MAINTAINERS file changes are needed to make sure that
 patches reach the correct maintainer, but don't change the actual
 responsibilities.
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Merge tag 'soc-fixes-6.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC fixes from Arnd Bergmann:
 "These are mainly devicetree fixes for the rockchip and nxp platforms
  on arm64, addressing mistakes in the board and soc specific
  descriptions.

  In particular the newly added Rock 5T board required multiple bugfixes
  for PCIe and USB, while on the i.MX platform there are a number of
  regulator related fixes. The only other platforms with devicetree
  fixes are at91 with a fixup for SD/MMC and a change to enable all the
  available UARTS on the Axiado reference board.

  Also on the at91 platform, a Kconfig change addresses a regression
  that stopped the DMA engine from working in 6.17-rc.

  Three drivers each have a simple bugfix, stopping incorrect behavior
  in op-tee firmware, the tee subsystem and the qualcomm mdt_loader.

  Two trivial MAINTAINERS file changes are needed to make sure that
  patches reach the correct maintainer, but don't change the actual
  responsibilities"

* tag 'soc-fixes-6.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (27 commits)
  ARM: dts: microchip: sama7d65: Force SDMMC Legacy mode
  ARM: at91: select ARCH_MICROCHIP
  arm64: dts: rockchip: fix second M.2 slot on ROCK 5T
  arm64: dts: rockchip: fix USB on RADXA ROCK 5T
  MAINTAINERS: exclude defconfig from ARM64 PORT
  arm64: dts: axiado: Add missing UART aliases
  MAINTAINERS: Update Nobuhiro Iwamatsu's email address
  arm64: dts: rockchip: Add vcc-supply to SPI flash on Pinephone Pro
  arm64: dts: rockchip: fix es8388 address on rk3588s-roc-pc
  arm64: dts: rockchip: Fix Bluetooth interrupts flag on Neardi LBA3368
  arm64: dts: rockchip: correct network description on Sige5
  arm64: dts: rockchip: Minor whitespace cleanup
  ARM: dts: rockchip: Minor whitespace cleanup
  arm64: dts: rockchip: Add supplies for eMMC on rk3588-orangepi-5
  arm64: dts: rockchip: Fix the headphone detection on the orangepi 5 plus
  arm64: dts: imx95: Fix JPEG encoder node assigned clock
  arm64: dts: imx95-19x19-evk: correct the phy setting for flexcan1/2
  arm64: dts: imx8mp: Fix missing microSD slot vqmmc on Data Modul i.MX8M Plus eDM SBC
  arm64: dts: imx8mp: Fix missing microSD slot vqmmc on DH electronics i.MX8M Plus DHCOM
  arm64: dts: imx8mp-tqma8mpql: remove virtual 3.3V regulator
  ...
This commit is contained in:
Linus Torvalds 2025-09-03 14:44:34 -07:00
commit b9a10f8764
32 changed files with 139 additions and 66 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
.mailmap
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@ -589,6 +589,7 @@ Nikolay Aleksandrov <razor@blackwall.org> <nikolay@redhat.com>
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@cumulusnetworks.com> Nikolay Aleksandrov <razor@blackwall.org> <nikolay@cumulusnetworks.com>
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@nvidia.com> Nikolay Aleksandrov <razor@blackwall.org> <nikolay@nvidia.com>
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@isovalent.com> Nikolay Aleksandrov <razor@blackwall.org> <nikolay@isovalent.com>
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.x90@mail.toshiba> <nobuhiro1.iwamatsu@toshiba.co.jp>
Odelu Kukatla <quic_okukatla@quicinc.com> <okukatla@codeaurora.org> Odelu Kukatla <quic_okukatla@quicinc.com> <okukatla@codeaurora.org>
Oleksandr Natalenko <oleksandr@natalenko.name> <oleksandr@redhat.com> Oleksandr Natalenko <oleksandr@natalenko.name> <oleksandr@redhat.com>
Oleksij Rempel <linux@rempel-privat.de> <bug-track@fisher-privat.net> Oleksij Rempel <linux@rempel-privat.de> <bug-track@fisher-privat.net>

3
MAINTAINERS
View File

@ -3526,7 +3526,7 @@ F: Documentation/devicetree/bindings/arm/ti/nspire.yaml
F: arch/arm/boot/dts/nspire/ F: arch/arm/boot/dts/nspire/
ARM/TOSHIBA VISCONTI ARCHITECTURE ARM/TOSHIBA VISCONTI ARCHITECTURE
M: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> M: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.x90@mail.toshiba>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Supported S: Supported
T: git git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti.git
@ -3667,6 +3667,7 @@ F: drivers/virt/coco/arm-cca-guest/
F: drivers/virt/coco/pkvm-guest/ F: drivers/virt/coco/pkvm-guest/
F: tools/testing/selftests/arm64/ F: tools/testing/selftests/arm64/
X: arch/arm64/boot/dts/ X: arch/arm64/boot/dts/
X: arch/arm64/configs/defconfig
ARROW SPEEDCHIPS XRS7000 SERIES ETHERNET SWITCH DRIVER ARROW SPEEDCHIPS XRS7000 SERIES ETHERNET SWITCH DRIVER
M: George McCollister <george.mccollister@gmail.com> M: George McCollister <george.mccollister@gmail.com>

2
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts
View File

@ -387,6 +387,8 @@
&sdmmc1 { &sdmmc1 {
bus-width = <4>; bus-width = <4>;
no-1-8-v;
sdhci-caps-mask = <0x0 0x00200000>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>; pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "okay"; status = "okay";

2
arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts
View File

@ -272,7 +272,7 @@
phy-mode = "rmii"; phy-mode = "rmii";
phy-handle = <&phy0>; phy-handle = <&phy0>;
assigned-clocks = <&cru SCLK_MAC_SRC>; assigned-clocks = <&cru SCLK_MAC_SRC>;
assigned-clock-rates= <50000000>; assigned-clock-rates = <50000000>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&rmii_pins>; pinctrl-0 = <&rmii_pins>;
status = "okay"; status = "okay";

6
arch/arm/boot/dts/rockchip/rv1109-relfor-saib.dts
View File

@ -250,9 +250,9 @@
&i2s0 { &i2s0 {
/delete-property/ pinctrl-0; /delete-property/ pinctrl-0;
rockchip,trcm-sync-rx-only; rockchip,trcm-sync-rx-only;
pinctrl-0 = <&i2s0m0_sclk_rx>, pinctrl-0 = <&i2s0m0_sclk_rx>,
<&i2s0m0_lrck_rx>, <&i2s0m0_lrck_rx>,
<&i2s0m0_sdi0>; <&i2s0m0_sdi0>;
pinctrl-names = "default"; pinctrl-names = "default";
status = "okay"; status = "okay";
}; };

4
arch/arm/mach-at91/Kconfig
View File

@ -1,4 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only # SPDX-License-Identifier: GPL-2.0-only
config ARCH_MICROCHIP
bool
menuconfig ARCH_AT91 menuconfig ARCH_AT91
bool "AT91/Microchip SoCs" bool "AT91/Microchip SoCs"
depends on (CPU_LITTLE_ENDIAN && (ARCH_MULTI_V4T || ARCH_MULTI_V5)) || \ depends on (CPU_LITTLE_ENDIAN && (ARCH_MULTI_V4T || ARCH_MULTI_V5)) || \
@ -8,6 +11,7 @@ menuconfig ARCH_AT91
select GPIOLIB select GPIOLIB
select PINCTRL select PINCTRL
select SOC_BUS select SOC_BUS
select ARCH_MICROCHIP
if ARCH_AT91 if ARCH_AT91
config SOC_SAMV7 config SOC_SAMV7

3
arch/arm64/boot/dts/axiado/ax3000-evk.dts
View File

@ -14,6 +14,9 @@
#size-cells = <2>; #size-cells = <2>;
aliases { aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3; serial3 = &uart3;
}; };

1
arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
View File

@ -555,6 +555,7 @@
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
vmmc-supply = <&reg_usdhc2_vmmc>; vmmc-supply = <&reg_usdhc2_vmmc>;
vqmmc-supply = <&ldo5>;
bus-width = <4>; bus-width = <4>;
status = "okay"; status = "okay";
}; };

1
arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
View File

@ -609,6 +609,7 @@
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
vmmc-supply = <&reg_usdhc2_vmmc>; vmmc-supply = <&reg_usdhc2_vmmc>;
vqmmc-supply = <&ldo5>;
bus-width = <4>; bus-width = <4>;
status = "okay"; status = "okay";
}; };

13
arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts
View File

@ -467,6 +467,10 @@
status = "okay"; status = "okay";
}; };
&reg_usdhc2_vqmmc {
status = "okay";
};
&sai5 { &sai5 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai5>; pinctrl-0 = <&pinctrl_sai5>;
@ -876,8 +880,7 @@
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d2>, <MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d2>,
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d2>, <MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d2>,
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d2>, <MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d2>,
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>, <MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>;
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
}; };
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
@ -886,8 +889,7 @@
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>, <MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>, <MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>, <MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>, <MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
}; };
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
@ -896,8 +898,7 @@
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>, <MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>, <MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>, <MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>, <MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
}; };
pinctrl_usdhc2_gpio: usdhc2-gpiogrp { pinctrl_usdhc2_gpio: usdhc2-gpiogrp {

13
arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
View File

@ -604,6 +604,10 @@
status = "okay"; status = "okay";
}; };
&reg_usdhc2_vqmmc {
status = "okay";
};
&sai3 { &sai3 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai3>; pinctrl-0 = <&pinctrl_sai3>;
@ -983,8 +987,7 @@
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d2>, <MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d2>,
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d2>, <MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d2>,
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d2>, <MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d2>,
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>, <MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>;
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
}; };
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
@ -993,8 +996,7 @@
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>, <MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>, <MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>, <MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>, <MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
}; };
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
@ -1003,8 +1005,7 @@
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>, <MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>, <MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>, <MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>, <MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
}; };
pinctrl_usdhc2_gpio: usdhc2-gpiogrp { pinctrl_usdhc2_gpio: usdhc2-gpiogrp {

31
arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi
View File

@ -16,13 +16,18 @@
reg = <0x0 0x40000000 0 0x80000000>; reg = <0x0 0x40000000 0 0x80000000>;
}; };
/* identical to buck4_reg, but should never change */ reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {
reg_vcc3v3: regulator-vcc3v3 { compatible = "regulator-gpio";
compatible = "regulator-fixed"; pinctrl-names = "default";
regulator-name = "VCC3V3"; pinctrl-0 = <&pinctrl_reg_usdhc2_vqmmc>;
regulator-min-microvolt = <3300000>; regulator-name = "V_SD2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
regulator-always-on; gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
states = <1800000 0x1>,
<3300000 0x0>;
vin-supply = <&ldo5_reg>;
status = "disabled";
}; };
}; };
@ -173,17 +178,21 @@
read-only; read-only;
reg = <0x53>; reg = <0x53>;
pagesize = <16>; pagesize = <16>;
vcc-supply = <&reg_vcc3v3>; vcc-supply = <&buck4_reg>;
}; };
m24c64: eeprom@57 { m24c64: eeprom@57 {
compatible = "atmel,24c64"; compatible = "atmel,24c64";
reg = <0x57>; reg = <0x57>;
pagesize = <32>; pagesize = <32>;
vcc-supply = <&reg_vcc3v3>; vcc-supply = <&buck4_reg>;
}; };
}; };
&usdhc2 {
vqmmc-supply = <&reg_usdhc2_vqmmc>;
};
&usdhc3 { &usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>; pinctrl-0 = <&pinctrl_usdhc3>;
@ -193,7 +202,7 @@
non-removable; non-removable;
no-sd; no-sd;
no-sdio; no-sdio;
vmmc-supply = <&reg_vcc3v3>; vmmc-supply = <&buck4_reg>;
vqmmc-supply = <&buck5_reg>; vqmmc-supply = <&buck5_reg>;
status = "okay"; status = "okay";
}; };
@ -233,6 +242,10 @@
fsl,pins = <MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x10>; fsl,pins = <MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x10>;
}; };
pinctrl_reg_usdhc2_vqmmc: regusdhc2vqmmcgrp {
fsl,pins = <MX8MP_IOMUXC_GPIO1_IO04__GPIO1_IO04 0xc0>;
};
pinctrl_usdhc3: usdhc3grp { pinctrl_usdhc3: usdhc3grp {
fsl,pins = <MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194>, fsl,pins = <MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194>,
<MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4>, <MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4>,

10
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
View File

@ -80,17 +80,17 @@
flexcan1_phy: can-phy0 { flexcan1_phy: can-phy0 {
compatible = "nxp,tjr1443"; compatible = "nxp,tjr1443";
#phy-cells = <0>; #phy-cells = <0>;
max-bitrate = <1000000>; max-bitrate = <8000000>;
enable-gpios = <&i2c6_pcal6416 6 GPIO_ACTIVE_HIGH>; enable-gpios = <&i2c6_pcal6416 6 GPIO_ACTIVE_HIGH>;
standby-gpios = <&i2c6_pcal6416 5 GPIO_ACTIVE_HIGH>; standby-gpios = <&i2c6_pcal6416 5 GPIO_ACTIVE_LOW>;
}; };
flexcan2_phy: can-phy1 { flexcan2_phy: can-phy1 {
compatible = "nxp,tjr1443"; compatible = "nxp,tjr1443";
#phy-cells = <0>; #phy-cells = <0>;
max-bitrate = <1000000>; max-bitrate = <8000000>;
enable-gpios = <&i2c6_pcal6416 4 GPIO_ACTIVE_HIGH>; enable-gpios = <&i2c4_gpio_expander_21 4 GPIO_ACTIVE_HIGH>;
standby-gpios = <&i2c6_pcal6416 3 GPIO_ACTIVE_HIGH>; standby-gpios = <&i2c4_gpio_expander_21 3 GPIO_ACTIVE_LOW>;
}; };
reg_vref_1v8: regulator-1p8v { reg_vref_1v8: regulator-1p8v {

2
arch/arm64/boot/dts/freescale/imx95.dtsi
View File

@ -1843,7 +1843,7 @@
<GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk IMX95_CLK_VPU>, clocks = <&scmi_clk IMX95_CLK_VPU>,
<&vpu_blk_ctrl IMX95_CLK_VPUBLK_JPEG_ENC>; <&vpu_blk_ctrl IMX95_CLK_VPUBLK_JPEG_ENC>;
assigned-clocks = <&vpu_blk_ctrl IMX95_CLK_VPUBLK_JPEG_DEC>; assigned-clocks = <&vpu_blk_ctrl IMX95_CLK_VPUBLK_JPEG_ENC>;
assigned-clock-parents = <&scmi_clk IMX95_CLK_VPUJPEG>; assigned-clock-parents = <&scmi_clk IMX95_CLK_VPUJPEG>;
power-domains = <&scmi_devpd IMX95_PD_VPU>; power-domains = <&scmi_devpd IMX95_PD_VPU>;
}; };

8
arch/arm64/boot/dts/rockchip/px30-pp1516.dtsi
View File

@ -72,7 +72,7 @@
}; };
vcc_cam_avdd: regulator-vcc-cam-avdd { vcc_cam_avdd: regulator-vcc-cam-avdd {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vcc_cam_avdd"; regulator-name = "vcc_cam_avdd";
gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
pinctrl-names = "default"; pinctrl-names = "default";
@ -83,7 +83,7 @@
}; };
vcc_cam_dovdd: regulator-vcc-cam-dovdd { vcc_cam_dovdd: regulator-vcc-cam-dovdd {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vcc_cam_dovdd"; regulator-name = "vcc_cam_dovdd";
gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>;
pinctrl-names = "default"; pinctrl-names = "default";
@ -94,7 +94,7 @@
}; };
vcc_cam_dvdd: regulator-vcc-cam-dvdd { vcc_cam_dvdd: regulator-vcc-cam-dvdd {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vcc_cam_dvdd"; regulator-name = "vcc_cam_dvdd";
gpio = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; gpio = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
enable-active-high; enable-active-high;
@ -106,7 +106,7 @@
}; };
vcc_lens_afvdd: regulator-vcc-lens-afvdd { vcc_lens_afvdd: regulator-vcc-lens-afvdd {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vcc_lens_afvdd"; regulator-name = "vcc_lens_afvdd";
gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default"; pinctrl-names = "default";

6
arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-video-demo.dtso
View File

@ -26,7 +26,7 @@
}; };
cam_afvdd_2v8: regulator-cam-afvdd-2v8 { cam_afvdd_2v8: regulator-cam-afvdd-2v8 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
gpio = <&pca9670 2 GPIO_ACTIVE_LOW>; gpio = <&pca9670 2 GPIO_ACTIVE_LOW>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
@ -35,7 +35,7 @@
}; };
cam_avdd_2v8: regulator-cam-avdd-2v8 { cam_avdd_2v8: regulator-cam-avdd-2v8 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
gpio = <&pca9670 4 GPIO_ACTIVE_LOW>; gpio = <&pca9670 4 GPIO_ACTIVE_LOW>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
@ -44,7 +44,7 @@
}; };
cam_dovdd_1v8: regulator-cam-dovdd-1v8 { cam_dovdd_1v8: regulator-cam-dovdd-1v8 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
gpio = <&pca9670 3 GPIO_ACTIVE_LOW>; gpio = <&pca9670 3 GPIO_ACTIVE_LOW>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;

2
arch/arm64/boot/dts/rockchip/rk3308-sakurapi-rk3308b.dts
View File

@ -260,6 +260,6 @@
status = "okay"; status = "okay";
}; };
&usb_host_ohci{ &usb_host_ohci {
status = "okay"; status = "okay";
}; };

2
arch/arm64/boot/dts/rockchip/rk3368-lba3368.dts
View File

@ -609,7 +609,7 @@
bluetooth { bluetooth {
compatible = "brcm,bcm4345c5"; compatible = "brcm,bcm4345c5";
interrupts-extended = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; interrupts-extended = <&gpio3 RK_PA7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host-wakeup"; interrupt-names = "host-wakeup";
clocks = <&rk808 RK808_CLKOUT1>; clocks = <&rk808 RK808_CLKOUT1>;
clock-names = "lpo"; clock-names = "lpo";

1
arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
View File

@ -959,6 +959,7 @@
reg = <0>; reg = <0>;
m25p,fast-read; m25p,fast-read;
spi-max-frequency = <10000000>; spi-max-frequency = <10000000>;
vcc-supply = <&vcc_3v0>;
}; };
}; };

1
arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
View File

@ -754,6 +754,7 @@
compatible = "jedec,spi-nor"; compatible = "jedec,spi-nor";
reg = <0>; reg = <0>;
spi-max-frequency = <10000000>; spi-max-frequency = <10000000>;
vcc-supply = <&vcc_1v8>;
}; };
}; };

6
arch/arm64/boot/dts/rockchip/rk3399-puma-haikou-video-demo.dtso
View File

@ -26,7 +26,7 @@
}; };
cam_afvdd_2v8: regulator-cam-afvdd-2v8 { cam_afvdd_2v8: regulator-cam-afvdd-2v8 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
gpio = <&pca9670 2 GPIO_ACTIVE_LOW>; gpio = <&pca9670 2 GPIO_ACTIVE_LOW>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
@ -35,7 +35,7 @@
}; };
cam_avdd_2v8: regulator-cam-avdd-2v8 { cam_avdd_2v8: regulator-cam-avdd-2v8 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
gpio = <&pca9670 4 GPIO_ACTIVE_LOW>; gpio = <&pca9670 4 GPIO_ACTIVE_LOW>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
@ -44,7 +44,7 @@
}; };
cam_dovdd_1v8: regulator-cam-dovdd-1v8 { cam_dovdd_1v8: regulator-cam-dovdd-1v8 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
gpio = <&pca9670 3 GPIO_ACTIVE_LOW>; gpio = <&pca9670 3 GPIO_ACTIVE_LOW>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;

4
arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
View File

@ -53,7 +53,7 @@
gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>; gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on"; linux,default-trigger = "default-on";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 =<&blue_led>; pinctrl-0 = <&blue_led>;
}; };
led-1 { led-1 {
@ -62,7 +62,7 @@
gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat"; linux,default-trigger = "heartbeat";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 =<&heartbeat_led>; pinctrl-0 = <&heartbeat_led>;
}; };
}; };

5
arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
View File

@ -302,8 +302,7 @@
&eth1m0_tx_bus2 &eth1m0_tx_bus2
&eth1m0_rx_bus2 &eth1m0_rx_bus2
&eth1m0_rgmii_clk &eth1m0_rgmii_clk
&eth1m0_rgmii_bus &eth1m0_rgmii_bus>;
&ethm0_clk1_25m_out>;
status = "okay"; status = "okay";
}; };
@ -784,7 +783,6 @@
rgmii_phy0: phy@1 { rgmii_phy0: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22"; compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>; reg = <0x1>;
clocks = <&cru REFCLKO25M_GMAC0_OUT>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&gmac0_rst>; pinctrl-0 = <&gmac0_rst>;
reset-assert-us = <20000>; reset-assert-us = <20000>;
@ -797,7 +795,6 @@
rgmii_phy1: phy@1 { rgmii_phy1: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22"; compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>; reg = <0x1>;
clocks = <&cru REFCLKO25M_GMAC1_OUT>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&gmac1_rst>; pinctrl-0 = <&gmac1_rst>;
reset-assert-us = <20000>; reset-assert-us = <20000>;

1
arch/arm64/boot/dts/rockchip/rk3582-radxa-e52c.dts
View File

@ -250,6 +250,7 @@
compatible = "belling,bl24c16a", "atmel,24c16"; compatible = "belling,bl24c16a", "atmel,24c16";
reg = <0x50>; reg = <0x50>;
pagesize = <16>; pagesize = <16>;
read-only;
vcc-supply = <&vcc_3v3_pmu>; vcc-supply = <&vcc_3v3_pmu>;
}; };
}; };

2
arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
View File

@ -77,7 +77,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&hp_detect>; pinctrl-0 = <&hp_detect>;
simple-audio-card,aux-devs = <&speaker_amp>, <&headphone_amp>; simple-audio-card,aux-devs = <&speaker_amp>, <&headphone_amp>;
simple-audio-card,hp-det-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>; simple-audio-card,hp-det-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
simple-audio-card,widgets = simple-audio-card,widgets =
"Microphone", "Onboard Microphone", "Microphone", "Onboard Microphone",
"Microphone", "Microphone Jack", "Microphone", "Microphone Jack",

2
arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi
View File

@ -365,6 +365,8 @@
max-frequency = <200000000>; max-frequency = <200000000>;
mmc-hs400-1_8v; mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe; mmc-hs400-enhanced-strobe;
vmmc-supply = <&vcc_3v3_s3>;
vqmmc-supply = <&vcc_1v8_s3>;
status = "okay"; status = "okay";
}; };

35
arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
View File

@ -68,6 +68,22 @@
status = "okay"; status = "okay";
}; };
&pcie30phy {
data-lanes = <1 1 2 2>;
};
&pcie3x2 {
pinctrl-names = "default";
pinctrl-0 = <&pcie3x2_rst>;
reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
&pcie3x4 {
num-lanes = <2>;
};
&pinctrl { &pinctrl {
hdmirx { hdmirx {
hdmirx_hpd: hdmirx-5v-detection { hdmirx_hpd: hdmirx-5v-detection {
@ -90,11 +106,23 @@
}; };
}; };
pcie3 {
pcie3x2_rst: pcie3x2-rst {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sound { sound {
hp_detect: hp-detect { hp_detect: hp-detect {
rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
}; };
}; };
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
}; };
&vcc3v3_pcie2x1l0 { &vcc3v3_pcie2x1l0 {
@ -103,3 +131,10 @@
pinctrl-0 = <&pcie2_0_vcc3v3_en>; pinctrl-0 = <&pcie2_0_vcc3v3_en>;
status = "okay"; status = "okay";
}; };
&vcc5v0_host {
enable-active-high;
gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
};

4
arch/arm64/boot/dts/rockchip/rk3588j.dtsi
View File

@ -28,7 +28,7 @@
compatible = "operating-points-v2"; compatible = "operating-points-v2";
opp-shared; opp-shared;
opp-1200000000{ opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>; opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <750000 750000 950000>; opp-microvolt = <750000 750000 950000>;
clock-latency-ns = <40000>; clock-latency-ns = <40000>;
@ -49,7 +49,7 @@
compatible = "operating-points-v2"; compatible = "operating-points-v2";
opp-shared; opp-shared;
opp-1200000000{ opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>; opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <750000 750000 950000>; opp-microvolt = <750000 750000 950000>;
clock-latency-ns = <40000>; clock-latency-ns = <40000>;

4
arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts
View File

@ -320,9 +320,9 @@
&i2c3 { &i2c3 {
status = "okay"; status = "okay";
es8388: audio-codec@10 { es8388: audio-codec@11 {
compatible = "everest,es8388", "everest,es8328"; compatible = "everest,es8388", "everest,es8328";
reg = <0x10>; reg = <0x11>;
clocks = <&cru I2S1_8CH_MCLKOUT>; clocks = <&cru I2S1_8CH_MCLKOUT>;
AVDD-supply = <&vcc_3v3_s0>; AVDD-supply = <&vcc_3v3_s0>;
DVDD-supply = <&vcc_1v8_s0>; DVDD-supply = <&vcc_1v8_s0>;

12
drivers/soc/qcom/mdt_loader.c
View File

@ -39,12 +39,14 @@ static bool mdt_header_valid(const struct firmware *fw)
if (phend > fw->size) if (phend > fw->size)
return false; return false;
if (ehdr->e_shentsize != sizeof(struct elf32_shdr)) if (ehdr->e_shentsize || ehdr->e_shnum) {
return false; if (ehdr->e_shentsize != sizeof(struct elf32_shdr))
return false;
shend = size_add(size_mul(sizeof(struct elf32_shdr), ehdr->e_shnum), ehdr->e_shoff); shend = size_add(size_mul(sizeof(struct elf32_shdr), ehdr->e_shnum), ehdr->e_shoff);
if (shend > fw->size) if (shend > fw->size)
return false; return false;
}
return true; return true;
} }

4
drivers/tee/optee/ffa_abi.c
View File

@ -657,7 +657,7 @@ static int optee_ffa_do_call_with_arg(struct tee_context *ctx,
* with a matching configuration. * with a matching configuration.
*/ */
static bool optee_ffa_api_is_compatbile(struct ffa_device *ffa_dev, static bool optee_ffa_api_is_compatible(struct ffa_device *ffa_dev,
const struct ffa_ops *ops) const struct ffa_ops *ops)
{ {
const struct ffa_msg_ops *msg_ops = ops->msg_ops; const struct ffa_msg_ops *msg_ops = ops->msg_ops;
@ -908,7 +908,7 @@ static int optee_ffa_probe(struct ffa_device *ffa_dev)
ffa_ops = ffa_dev->ops; ffa_ops = ffa_dev->ops;
notif_ops = ffa_ops->notifier_ops; notif_ops = ffa_ops->notifier_ops;
if (!optee_ffa_api_is_compatbile(ffa_dev, ffa_ops)) if (!optee_ffa_api_is_compatible(ffa_dev, ffa_ops))
return -EINVAL; return -EINVAL;
if (!optee_ffa_exchange_caps(ffa_dev, ffa_ops, &sec_caps, if (!optee_ffa_exchange_caps(ffa_dev, ffa_ops, &sec_caps,

14
drivers/tee/tee_shm.c
View File

@ -230,7 +230,7 @@ int tee_dyn_shm_alloc_helper(struct tee_shm *shm, size_t size, size_t align,
pages = kcalloc(nr_pages, sizeof(*pages), GFP_KERNEL); pages = kcalloc(nr_pages, sizeof(*pages), GFP_KERNEL);
if (!pages) { if (!pages) {
rc = -ENOMEM; rc = -ENOMEM;
goto err; goto err_pages;
} }
for (i = 0; i < nr_pages; i++) for (i = 0; i < nr_pages; i++)
@ -243,11 +243,13 @@ int tee_dyn_shm_alloc_helper(struct tee_shm *shm, size_t size, size_t align,
rc = shm_register(shm->ctx, shm, pages, nr_pages, rc = shm_register(shm->ctx, shm, pages, nr_pages,
(unsigned long)shm->kaddr); (unsigned long)shm->kaddr);
if (rc) if (rc)
goto err; goto err_kfree;
} }
return 0; return 0;
err: err_kfree:
kfree(pages);
err_pages:
free_pages_exact(shm->kaddr, shm->size); free_pages_exact(shm->kaddr, shm->size);
shm->kaddr = NULL; shm->kaddr = NULL;
return rc; return rc;
@ -560,9 +562,13 @@ EXPORT_SYMBOL_GPL(tee_shm_get_from_id);
*/ */
void tee_shm_put(struct tee_shm *shm) void tee_shm_put(struct tee_shm *shm)
{ {
struct tee_device *teedev = shm->ctx->teedev; struct tee_device *teedev;
bool do_release = false; bool do_release = false;
if (!shm || !shm->ctx || !shm->ctx->teedev)
return;
teedev = shm->ctx->teedev;
mutex_lock(&teedev->mutex); mutex_lock(&teedev->mutex);
if (refcount_dec_and_test(&shm->refcount)) { if (refcount_dec_and_test(&shm->refcount)) {
/* /*