torvalds/linux
torvalds/linux
2
0
Fork 0
mirror of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2025-09-04 20:19:47 +08:00
Code

i40e: use libie adminq descriptors

Browse Source 
Use libie_aq_desc instead of i40e_aq_desc. Do needed changes to allow
clean build.

Get version descriptor is a little less detailed on i40e. To not mess up
with shifting or union inside libie desc use get version descriptor from
i40e.

Move additional caps for i40e to libie.

Fix RCT in declaration that is using libie_aq_desc;

Use libie_aq_raw() wherever it can be used.

The libie aq error is extended, cover it in ice driver just to clean
build. In next patches the libie code for that will be used in each
of intel driver.

Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Signed-off-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
Tested-by: Rinitha S <sx.rinitha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
This commit is contained in:
Michal Swiatkowski 2025-04-25 08:08:04 +02:00 committed by Tony Nguyen
parent 5b36bef444
commit b46012a200
13 changed files with 499 additions and 650 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

68
drivers/net/ethernet/intel/i40e/i40e_adminq.c
View File

@ -18,7 +18,7 @@ static int i40e_alloc_adminq_asq_ring(struct i40e_hw *hw)
ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf,
(hw->aq.num_asq_entries * (hw->aq.num_asq_entries *
sizeof(struct i40e_aq_desc)), sizeof(struct libie_aq_desc)),
I40E_ADMINQ_DESC_ALIGNMENT); I40E_ADMINQ_DESC_ALIGNMENT);
if (ret_code) if (ret_code)
return ret_code; return ret_code;
@ -44,7 +44,7 @@ static int i40e_alloc_adminq_arq_ring(struct i40e_hw *hw)
ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf, ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf,
(hw->aq.num_arq_entries * (hw->aq.num_arq_entries *
sizeof(struct i40e_aq_desc)), sizeof(struct libie_aq_desc)),
I40E_ADMINQ_DESC_ALIGNMENT); I40E_ADMINQ_DESC_ALIGNMENT);
return ret_code; return ret_code;
@ -80,7 +80,7 @@ static void i40e_free_adminq_arq(struct i40e_hw *hw)
**/ **/
static int i40e_alloc_arq_bufs(struct i40e_hw *hw) static int i40e_alloc_arq_bufs(struct i40e_hw *hw)
{ {
struct i40e_aq_desc *desc; struct libie_aq_desc *desc;
struct i40e_dma_mem *bi; struct i40e_dma_mem *bi;
int ret_code; int ret_code;
int i; int i;
@ -108,9 +108,9 @@ static int i40e_alloc_arq_bufs(struct i40e_hw *hw)
/* now configure the descriptors for use */ /* now configure the descriptors for use */
desc = I40E_ADMINQ_DESC(hw->aq.arq, i); desc = I40E_ADMINQ_DESC(hw->aq.arq, i);
desc->flags = cpu_to_le16(I40E_AQ_FLAG_BUF); desc->flags = cpu_to_le16(LIBIE_AQ_FLAG_BUF);
if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF) if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF)
desc->flags |= cpu_to_le16(I40E_AQ_FLAG_LB); desc->flags |= cpu_to_le16(LIBIE_AQ_FLAG_LB);
desc->opcode = 0; desc->opcode = 0;
/* This is in accordance with Admin queue design, there is no /* This is in accordance with Admin queue design, there is no
* register for buffer size configuration * register for buffer size configuration
@ -119,12 +119,12 @@ static int i40e_alloc_arq_bufs(struct i40e_hw *hw)
desc->retval = 0; desc->retval = 0;
desc->cookie_high = 0; desc->cookie_high = 0;
desc->cookie_low = 0; desc->cookie_low = 0;
desc->params.external.addr_high = desc->params.generic.addr_high =
cpu_to_le32(upper_32_bits(bi->pa)); cpu_to_le32(upper_32_bits(bi->pa));
desc->params.external.addr_low = desc->params.generic.addr_low =
cpu_to_le32(lower_32_bits(bi->pa)); cpu_to_le32(lower_32_bits(bi->pa));
desc->params.external.param0 = 0; desc->params.generic.param0 = 0;
desc->params.external.param1 = 0; desc->params.generic.param1 = 0;
} }
alloc_arq_bufs: alloc_arq_bufs:
@ -691,8 +691,8 @@ static u16 i40e_clean_asq(struct i40e_hw *hw)
struct i40e_adminq_ring *asq = &(hw->aq.asq); struct i40e_adminq_ring *asq = &(hw->aq.asq);
struct i40e_asq_cmd_details *details; struct i40e_asq_cmd_details *details;
u16 ntc = asq->next_to_clean; u16 ntc = asq->next_to_clean;
struct i40e_aq_desc desc_cb; struct libie_aq_desc desc_cb;
struct i40e_aq_desc *desc; struct libie_aq_desc *desc;
desc = I40E_ADMINQ_DESC(*asq, ntc); desc = I40E_ADMINQ_DESC(*asq, ntc);
details = I40E_ADMINQ_DETAILS(*asq, ntc); details = I40E_ADMINQ_DETAILS(*asq, ntc);
@ -750,7 +750,7 @@ static bool i40e_asq_done(struct i40e_hw *hw)
**/ **/
static int static int
i40e_asq_send_command_atomic_exec(struct i40e_hw *hw, i40e_asq_send_command_atomic_exec(struct i40e_hw *hw,
struct i40e_aq_desc *desc, struct libie_aq_desc *desc,
void *buff, /* can be NULL */ void *buff, /* can be NULL */
u16 buff_size, u16 buff_size,
struct i40e_asq_cmd_details *cmd_details, struct i40e_asq_cmd_details *cmd_details,
@ -758,7 +758,7 @@ i40e_asq_send_command_atomic_exec(struct i40e_hw *hw,
{ {
struct i40e_dma_mem *dma_buff = NULL; struct i40e_dma_mem *dma_buff = NULL;
struct i40e_asq_cmd_details *details; struct i40e_asq_cmd_details *details;
struct i40e_aq_desc *desc_on_ring; struct libie_aq_desc *desc_on_ring;
bool cmd_completed = false; bool cmd_completed = false;
u16 retval = 0; u16 retval = 0;
int status = 0; int status = 0;
@ -771,7 +771,7 @@ i40e_asq_send_command_atomic_exec(struct i40e_hw *hw,
goto asq_send_command_error; goto asq_send_command_error;
} }
hw->aq.asq_last_status = I40E_AQ_RC_OK; hw->aq.asq_last_status = LIBIE_AQ_RC_OK;
val = rd32(hw, I40E_PF_ATQH); val = rd32(hw, I40E_PF_ATQH);
if (val >= hw->aq.num_asq_entries) { if (val >= hw->aq.num_asq_entries) {
@ -851,9 +851,9 @@ i40e_asq_send_command_atomic_exec(struct i40e_hw *hw,
/* Update the address values in the desc with the pa value /* Update the address values in the desc with the pa value
* for respective buffer * for respective buffer
*/ */
desc_on_ring->params.external.addr_high = desc_on_ring->params.generic.addr_high =
cpu_to_le32(upper_32_bits(dma_buff->pa)); cpu_to_le32(upper_32_bits(dma_buff->pa));
desc_on_ring->params.external.addr_low = desc_on_ring->params.generic.addr_low =
cpu_to_le32(lower_32_bits(dma_buff->pa)); cpu_to_le32(lower_32_bits(dma_buff->pa));
} }
@ -905,13 +905,13 @@ i40e_asq_send_command_atomic_exec(struct i40e_hw *hw,
retval &= 0xff; retval &= 0xff;
} }
cmd_completed = true; cmd_completed = true;
if ((enum i40e_admin_queue_err)retval == I40E_AQ_RC_OK) if ((enum libie_aq_err)retval == LIBIE_AQ_RC_OK)
status = 0; status = 0;
else if ((enum i40e_admin_queue_err)retval == I40E_AQ_RC_EBUSY) else if ((enum libie_aq_err)retval == LIBIE_AQ_RC_EBUSY)
status = -EBUSY; status = -EBUSY;
else else
status = -EIO; status = -EIO;
hw->aq.asq_last_status = (enum i40e_admin_queue_err)retval; hw->aq.asq_last_status = (enum libie_aq_err)retval;
} }
i40e_debug(hw, I40E_DEBUG_AQ_COMMAND, i40e_debug(hw, I40E_DEBUG_AQ_COMMAND,
@ -954,7 +954,7 @@ asq_send_command_error:
**/ **/
int int
i40e_asq_send_command_atomic(struct i40e_hw *hw, i40e_asq_send_command_atomic(struct i40e_hw *hw,
struct i40e_aq_desc *desc, struct libie_aq_desc *desc,
void *buff, /* can be NULL */ void *buff, /* can be NULL */
u16 buff_size, u16 buff_size,
struct i40e_asq_cmd_details *cmd_details, struct i40e_asq_cmd_details *cmd_details,
@ -972,7 +972,7 @@ i40e_asq_send_command_atomic(struct i40e_hw *hw,
} }
int int
i40e_asq_send_command(struct i40e_hw *hw, struct i40e_aq_desc *desc, i40e_asq_send_command(struct i40e_hw *hw, struct libie_aq_desc *desc,
void *buff, /* can be NULL */ u16 buff_size, void *buff, /* can be NULL */ u16 buff_size,
struct i40e_asq_cmd_details *cmd_details) struct i40e_asq_cmd_details *cmd_details)
{ {
@ -996,12 +996,12 @@ i40e_asq_send_command(struct i40e_hw *hw, struct i40e_aq_desc *desc,
**/ **/
int int
i40e_asq_send_command_atomic_v2(struct i40e_hw *hw, i40e_asq_send_command_atomic_v2(struct i40e_hw *hw,
struct i40e_aq_desc *desc, struct libie_aq_desc *desc,
void *buff, /* can be NULL */ void *buff, /* can be NULL */
u16 buff_size, u16 buff_size,
struct i40e_asq_cmd_details *cmd_details, struct i40e_asq_cmd_details *cmd_details,
bool is_atomic_context, bool is_atomic_context,
enum i40e_admin_queue_err *aq_status) enum libie_aq_err *aq_status)
{ {
int status; int status;
@ -1023,13 +1023,13 @@ i40e_asq_send_command_atomic_v2(struct i40e_hw *hw,
* *
* Fill the desc with default values * Fill the desc with default values
**/ **/
void i40e_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc, void i40e_fill_default_direct_cmd_desc(struct libie_aq_desc *desc,
u16 opcode) u16 opcode)
{ {
/* zero out the desc */ /* zero out the desc */
memset((void *)desc, 0, sizeof(struct i40e_aq_desc)); memset((void *)desc, 0, sizeof(struct libie_aq_desc));
desc->opcode = cpu_to_le16(opcode); desc->opcode = cpu_to_le16(opcode);
desc->flags = cpu_to_le16(I40E_AQ_FLAG_SI); desc->flags = cpu_to_le16(LIBIE_AQ_FLAG_SI);
} }
/** /**
@ -1047,7 +1047,7 @@ int i40e_clean_arq_element(struct i40e_hw *hw,
u16 *pending) u16 *pending)
{ {
u16 ntc = hw->aq.arq.next_to_clean; u16 ntc = hw->aq.arq.next_to_clean;
struct i40e_aq_desc *desc; struct libie_aq_desc *desc;
struct i40e_dma_mem *bi; struct i40e_dma_mem *bi;
int ret_code = 0; int ret_code = 0;
u16 desc_idx; u16 desc_idx;
@ -1081,9 +1081,9 @@ int i40e_clean_arq_element(struct i40e_hw *hw,
desc_idx = ntc; desc_idx = ntc;
hw->aq.arq_last_status = hw->aq.arq_last_status =
(enum i40e_admin_queue_err)le16_to_cpu(desc->retval); (enum libie_aq_err)le16_to_cpu(desc->retval);
flags = le16_to_cpu(desc->flags); flags = le16_to_cpu(desc->flags);
if (flags & I40E_AQ_FLAG_ERR) { if (flags & LIBIE_AQ_FLAG_ERR) {
ret_code = -EIO; ret_code = -EIO;
i40e_debug(hw, i40e_debug(hw,
I40E_DEBUG_AQ_MESSAGE, I40E_DEBUG_AQ_MESSAGE,
@ -1107,14 +1107,14 @@ int i40e_clean_arq_element(struct i40e_hw *hw,
* size * size
*/ */
bi = &hw->aq.arq.r.arq_bi[ntc]; bi = &hw->aq.arq.r.arq_bi[ntc];
memset((void *)desc, 0, sizeof(struct i40e_aq_desc)); memset((void *)desc, 0, sizeof(struct libie_aq_desc));
desc->flags = cpu_to_le16(I40E_AQ_FLAG_BUF); desc->flags = cpu_to_le16(LIBIE_AQ_FLAG_BUF);
if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF) if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF)
desc->flags |= cpu_to_le16(I40E_AQ_FLAG_LB); desc->flags |= cpu_to_le16(LIBIE_AQ_FLAG_LB);
desc->datalen = cpu_to_le16((u16)bi->size); desc->datalen = cpu_to_le16((u16)bi->size);
desc->params.external.addr_high = cpu_to_le32(upper_32_bits(bi->pa)); desc->params.generic.addr_high = cpu_to_le32(upper_32_bits(bi->pa));
desc->params.external.addr_low = cpu_to_le32(lower_32_bits(bi->pa)); desc->params.generic.addr_low = cpu_to_le32(lower_32_bits(bi->pa));
/* set tail = the last cleaned desc index. */ /* set tail = the last cleaned desc index. */
wr32(hw, I40E_PF_ARQT, ntc); wr32(hw, I40E_PF_ARQT, ntc);

12
drivers/net/ethernet/intel/i40e/i40e_adminq.h
View File

@ -9,7 +9,7 @@
#include "i40e_adminq_cmd.h" #include "i40e_adminq_cmd.h"
#define I40E_ADMINQ_DESC(R, i) \ #define I40E_ADMINQ_DESC(R, i) \
(&(((struct i40e_aq_desc *)((R).desc_buf.va))[i])) (&(((struct libie_aq_desc *)((R).desc_buf.va))[i]))
#define I40E_ADMINQ_DESC_ALIGNMENT 4096 #define I40E_ADMINQ_DESC_ALIGNMENT 4096
@ -39,7 +39,7 @@ struct i40e_asq_cmd_details {
u16 flags_dis; u16 flags_dis;
bool async; bool async;
bool postpone; bool postpone;
struct i40e_aq_desc *wb_desc; struct libie_aq_desc *wb_desc;
}; };
#define I40E_ADMINQ_DETAILS(R, i) \ #define I40E_ADMINQ_DETAILS(R, i) \
@ -47,7 +47,7 @@ struct i40e_asq_cmd_details {
/* ARQ event information */ /* ARQ event information */
struct i40e_arq_event_info { struct i40e_arq_event_info {
struct i40e_aq_desc desc; struct libie_aq_desc desc;
u16 msg_len; u16 msg_len;
u16 buf_len; u16 buf_len;
u8 *msg_buf; u8 *msg_buf;
@ -72,8 +72,8 @@ struct i40e_adminq_info {
struct mutex arq_mutex; /* Receive queue lock */ struct mutex arq_mutex; /* Receive queue lock */
/* last status values on send and receive queues */ /* last status values on send and receive queues */
enum i40e_admin_queue_err asq_last_status; enum libie_aq_err asq_last_status;
enum i40e_admin_queue_err arq_last_status; enum libie_aq_err arq_last_status;
}; };
/** /**
@ -119,7 +119,7 @@ static inline int i40e_aq_rc_to_posix(int aq_ret, int aq_rc)
#define I40E_AQ_LARGE_BUF 512 #define I40E_AQ_LARGE_BUF 512
#define I40E_ASQ_CMD_TIMEOUT 250000 /* usecs */ #define I40E_ASQ_CMD_TIMEOUT 250000 /* usecs */
void i40e_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc, void i40e_fill_default_direct_cmd_desc(struct libie_aq_desc *desc,
u16 opcode); u16 opcode);
#endif /* _I40E_ADMINQ_H_ */ #endif /* _I40E_ADMINQ_H_ */

155
drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
View File

@ -4,6 +4,8 @@
#ifndef _I40E_ADMINQ_CMD_H_ #ifndef _I40E_ADMINQ_CMD_H_
#define _I40E_ADMINQ_CMD_H_ #define _I40E_ADMINQ_CMD_H_
#include <linux/net/intel/libie/adminq.h>
#include <linux/bits.h> #include <linux/bits.h>
#include <linux/types.h> #include <linux/types.h>
@ -30,75 +32,6 @@
/* API version 1.10 for X722 devices adds ability to request FEC encoding */ /* API version 1.10 for X722 devices adds ability to request FEC encoding */
#define I40E_MINOR_VER_FW_REQUEST_FEC_X722 0x000A #define I40E_MINOR_VER_FW_REQUEST_FEC_X722 0x000A
struct i40e_aq_desc {
__le16 flags;
__le16 opcode;
__le16 datalen;
__le16 retval;
__le32 cookie_high;
__le32 cookie_low;
union {
struct {
__le32 param0;
__le32 param1;
__le32 param2;
__le32 param3;
} internal;
struct {
__le32 param0;
__le32 param1;
__le32 addr_high;
__le32 addr_low;
} external;
u8 raw[16];
} params;
};
/* Flags sub-structure
* |0 |1 |2 |3 |4 |5 |6 |7 |8 |9 |10 |11 |12 |13 |14 |15 |
* |DD |CMP|ERR|VFE| * * RESERVED * * |LB |RD |VFC|BUF|SI |EI |FE |
*/
/* command flags and offsets*/
#define I40E_AQ_FLAG_ERR_SHIFT 2
#define I40E_AQ_FLAG_LB_SHIFT 9
#define I40E_AQ_FLAG_RD_SHIFT 10
#define I40E_AQ_FLAG_BUF_SHIFT 12
#define I40E_AQ_FLAG_SI_SHIFT 13
#define I40E_AQ_FLAG_ERR BIT(I40E_AQ_FLAG_ERR_SHIFT) /* 0x4 */
#define I40E_AQ_FLAG_LB BIT(I40E_AQ_FLAG_LB_SHIFT) /* 0x200 */
#define I40E_AQ_FLAG_RD BIT(I40E_AQ_FLAG_RD_SHIFT) /* 0x400 */
#define I40E_AQ_FLAG_BUF BIT(I40E_AQ_FLAG_BUF_SHIFT) /* 0x1000 */
#define I40E_AQ_FLAG_SI BIT(I40E_AQ_FLAG_SI_SHIFT) /* 0x2000 */
/* error codes */
enum i40e_admin_queue_err {
I40E_AQ_RC_OK = 0, /* success */
I40E_AQ_RC_EPERM = 1, /* Operation not permitted */
I40E_AQ_RC_ENOENT = 2, /* No such element */
I40E_AQ_RC_ESRCH = 3, /* Bad opcode */
I40E_AQ_RC_EINTR = 4, /* operation interrupted */
I40E_AQ_RC_EIO = 5, /* I/O error */
I40E_AQ_RC_ENXIO = 6, /* No such resource */
I40E_AQ_RC_E2BIG = 7, /* Arg too long */
I40E_AQ_RC_EAGAIN = 8, /* Try again */
I40E_AQ_RC_ENOMEM = 9, /* Out of memory */
I40E_AQ_RC_EACCES = 10, /* Permission denied */
I40E_AQ_RC_EFAULT = 11, /* Bad address */
I40E_AQ_RC_EBUSY = 12, /* Device or resource busy */
I40E_AQ_RC_EEXIST = 13, /* object already exists */
I40E_AQ_RC_EINVAL = 14, /* Invalid argument */
I40E_AQ_RC_ENOTTY = 15, /* Not a typewriter */
I40E_AQ_RC_ENOSPC = 16, /* No space left or alloc failure */
I40E_AQ_RC_ENOSYS = 17, /* Function not implemented */
I40E_AQ_RC_ERANGE = 18, /* Parameter out of range */
I40E_AQ_RC_EFLUSHED = 19, /* Cmd flushed due to prev cmd error */
I40E_AQ_RC_BAD_ADDR = 20, /* Descriptor contains a bad pointer */
I40E_AQ_RC_EMODE = 21, /* Op not allowed in current dev mode */
I40E_AQ_RC_EFBIG = 22, /* File too large */
};
/* Admin Queue command opcodes */ /* Admin Queue command opcodes */
enum i40e_admin_queue_opc { enum i40e_admin_queue_opc {
/* aq commands */ /* aq commands */
@ -320,21 +253,6 @@ struct i40e_aqc_get_version {
__le16 api_minor; __le16 api_minor;
}; };
I40E_CHECK_CMD_LENGTH(i40e_aqc_get_version);
/* Send driver version (indirect 0x0002) */
struct i40e_aqc_driver_version {
u8 driver_major_ver;
u8 driver_minor_ver;
u8 driver_build_ver;
u8 driver_subbuild_ver;
u8 reserved[4];
__le32 address_high;
__le32 address_low;
};
I40E_CHECK_CMD_LENGTH(i40e_aqc_driver_version);
/* Queue Shutdown (direct 0x0003) */ /* Queue Shutdown (direct 0x0003) */
struct i40e_aqc_queue_shutdown { struct i40e_aqc_queue_shutdown {
__le32 driver_unloading; __le32 driver_unloading;
@ -352,75 +270,6 @@ struct i40e_aqc_set_pf_context {
I40E_CHECK_CMD_LENGTH(i40e_aqc_set_pf_context); I40E_CHECK_CMD_LENGTH(i40e_aqc_set_pf_context);
/* Request resource ownership (direct 0x0008)
* Release resource ownership (direct 0x0009)
*/
struct i40e_aqc_request_resource {
__le16 resource_id;
__le16 access_type;
__le32 timeout;
__le32 resource_number;
u8 reserved[4];
};
I40E_CHECK_CMD_LENGTH(i40e_aqc_request_resource);
/* Get function capabilities (indirect 0x000A)
* Get device capabilities (indirect 0x000B)
*/
struct i40e_aqc_list_capabilites {
u8 command_flags;
u8 pf_index;
u8 reserved[2];
__le32 count;
__le32 addr_high;
__le32 addr_low;
};
I40E_CHECK_CMD_LENGTH(i40e_aqc_list_capabilites);
struct i40e_aqc_list_capabilities_element_resp {
__le16 id;
u8 major_rev;
u8 minor_rev;
__le32 number;
__le32 logical_id;
__le32 phys_id;
u8 reserved[16];
};
/* list of caps */
#define I40E_AQ_CAP_ID_SWITCH_MODE 0x0001
#define I40E_AQ_CAP_ID_MNG_MODE 0x0002
#define I40E_AQ_CAP_ID_NPAR_ACTIVE 0x0003
#define I40E_AQ_CAP_ID_OS2BMC_CAP 0x0004
#define I40E_AQ_CAP_ID_FUNCTIONS_VALID 0x0005
#define I40E_AQ_CAP_ID_SRIOV 0x0012
#define I40E_AQ_CAP_ID_VF 0x0013
#define I40E_AQ_CAP_ID_VMDQ 0x0014
#define I40E_AQ_CAP_ID_8021QBG 0x0015
#define I40E_AQ_CAP_ID_8021QBR 0x0016
#define I40E_AQ_CAP_ID_VSI 0x0017
#define I40E_AQ_CAP_ID_DCB 0x0018
#define I40E_AQ_CAP_ID_FCOE 0x0021
#define I40E_AQ_CAP_ID_ISCSI 0x0022
#define I40E_AQ_CAP_ID_RSS 0x0040
#define I40E_AQ_CAP_ID_RXQ 0x0041
#define I40E_AQ_CAP_ID_TXQ 0x0042
#define I40E_AQ_CAP_ID_MSIX 0x0043
#define I40E_AQ_CAP_ID_VF_MSIX 0x0044
#define I40E_AQ_CAP_ID_FLOW_DIRECTOR 0x0045
#define I40E_AQ_CAP_ID_1588 0x0046
#define I40E_AQ_CAP_ID_IWARP 0x0051
#define I40E_AQ_CAP_ID_LED 0x0061
#define I40E_AQ_CAP_ID_SDP 0x0062
#define I40E_AQ_CAP_ID_MDIO 0x0063
#define I40E_AQ_CAP_ID_WSR_PROT 0x0064
#define I40E_AQ_CAP_ID_NVM_MGMT 0x0080
#define I40E_AQ_CAP_ID_FLEX10 0x00F1
#define I40E_AQ_CAP_ID_CEM 0x00F2
/* Set CPPM Configuration (direct 0x0103) */ /* Set CPPM Configuration (direct 0x0103) */
struct i40e_aqc_cppm_configuration { struct i40e_aqc_cppm_configuration {
__le16 command_flags; __le16 command_flags;

754
drivers/net/ethernet/intel/i40e/i40e_common.c
View File

File diff suppressed because it is too large Load Diff

10
drivers/net/ethernet/intel/i40e/i40e_dcb.c
View File

@ -750,7 +750,7 @@ static int i40e_get_ieee_dcb_config(struct i40e_hw *hw)
I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE, I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
&hw->remote_dcbx_config); &hw->remote_dcbx_config);
/* Don't treat ENOENT as an error for Remote MIBs */ /* Don't treat ENOENT as an error for Remote MIBs */
if (hw->aq.asq_last_status == I40E_AQ_RC_ENOENT) if (hw->aq.asq_last_status == LIBIE_AQ_RC_ENOENT)
ret = 0; ret = 0;
out: out:
@ -799,7 +799,7 @@ int i40e_get_dcb_config(struct i40e_hw *hw)
} }
/* CEE mode not enabled try querying IEEE data */ /* CEE mode not enabled try querying IEEE data */
if (hw->aq.asq_last_status == I40E_AQ_RC_ENOENT) if (hw->aq.asq_last_status == LIBIE_AQ_RC_ENOENT)
return i40e_get_ieee_dcb_config(hw); return i40e_get_ieee_dcb_config(hw);
if (ret) if (ret)
@ -816,7 +816,7 @@ int i40e_get_dcb_config(struct i40e_hw *hw)
I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE, I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
&hw->remote_dcbx_config); &hw->remote_dcbx_config);
/* Don't treat ENOENT as an error for Remote MIBs */ /* Don't treat ENOENT as an error for Remote MIBs */
if (hw->aq.asq_last_status == I40E_AQ_RC_ENOENT) if (hw->aq.asq_last_status == LIBIE_AQ_RC_ENOENT)
ret = 0; ret = 0;
out: out:
@ -925,11 +925,11 @@ i40e_get_fw_lldp_status(struct i40e_hw *hw,
if (!ret) { if (!ret) {
*lldp_status = I40E_GET_FW_LLDP_STATUS_ENABLED; *lldp_status = I40E_GET_FW_LLDP_STATUS_ENABLED;
} else if (hw->aq.asq_last_status == I40E_AQ_RC_ENOENT) { } else if (hw->aq.asq_last_status == LIBIE_AQ_RC_ENOENT) {
/* MIB is not available yet but the agent is running */ /* MIB is not available yet but the agent is running */
*lldp_status = I40E_GET_FW_LLDP_STATUS_ENABLED; *lldp_status = I40E_GET_FW_LLDP_STATUS_ENABLED;
ret = 0; ret = 0;
} else if (hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { } else if (hw->aq.asq_last_status == LIBIE_AQ_RC_EPERM) {
*lldp_status = I40E_GET_FW_LLDP_STATUS_DISABLED; *lldp_status = I40E_GET_FW_LLDP_STATUS_DISABLED;
ret = 0; ret = 0;
} }

46
drivers/net/ethernet/intel/i40e/i40e_debugfs.c
View File

@ -489,7 +489,7 @@ static void i40e_dbg_dump_aq_desc(struct i40e_pf *pf)
dev_info(&pf->pdev->dev, "AdminQ Tx Ring\n"); dev_info(&pf->pdev->dev, "AdminQ Tx Ring\n");
ring = &(hw->aq.asq); ring = &(hw->aq.asq);
for (i = 0; i < ring->count; i++) { for (i = 0; i < ring->count; i++) {
struct i40e_aq_desc *d = I40E_ADMINQ_DESC(*ring, i); struct libie_aq_desc *d = I40E_ADMINQ_DESC(*ring, i);
dev_info(&pf->pdev->dev, dev_info(&pf->pdev->dev,
" at[%02d] flags=0x%04x op=0x%04x dlen=0x%04x ret=0x%04x cookie_h=0x%08x cookie_l=0x%08x\n", " at[%02d] flags=0x%04x op=0x%04x dlen=0x%04x ret=0x%04x cookie_h=0x%08x cookie_l=0x%08x\n",
@ -502,7 +502,7 @@ static void i40e_dbg_dump_aq_desc(struct i40e_pf *pf)
dev_info(&pf->pdev->dev, "AdminQ Rx Ring\n"); dev_info(&pf->pdev->dev, "AdminQ Rx Ring\n");
ring = &(hw->aq.arq); ring = &(hw->aq.arq);
for (i = 0; i < ring->count; i++) { for (i = 0; i < ring->count; i++) {
struct i40e_aq_desc *d = I40E_ADMINQ_DESC(*ring, i); struct libie_aq_desc *d = I40E_ADMINQ_DESC(*ring, i);
dev_info(&pf->pdev->dev, dev_info(&pf->pdev->dev,
" ar[%02d] flags=0x%04x op=0x%04x dlen=0x%04x ret=0x%04x cookie_h=0x%08x cookie_l=0x%08x\n", " ar[%02d] flags=0x%04x op=0x%04x dlen=0x%04x ret=0x%04x cookie_h=0x%08x cookie_l=0x%08x\n",
@ -1268,10 +1268,10 @@ static ssize_t i40e_dbg_command_write(struct file *filp,
dev_info(&pf->pdev->dev, "clear_stats vsi [seid] or clear_stats port\n"); dev_info(&pf->pdev->dev, "clear_stats vsi [seid] or clear_stats port\n");
} }
} else if (strncmp(cmd_buf, "send aq_cmd", 11) == 0) { } else if (strncmp(cmd_buf, "send aq_cmd", 11) == 0) {
struct i40e_aq_desc *desc; struct libie_aq_desc *desc;
int ret; int ret;
desc = kzalloc(sizeof(struct i40e_aq_desc), GFP_KERNEL); desc = kzalloc(sizeof(*desc), GFP_KERNEL);
if (!desc) if (!desc)
goto command_write_done; goto command_write_done;
cnt = sscanf(&cmd_buf[11], cnt = sscanf(&cmd_buf[11],
@ -1279,10 +1279,10 @@ static ssize_t i40e_dbg_command_write(struct file *filp,
&desc->flags, &desc->flags,
&desc->opcode, &desc->datalen, &desc->retval, &desc->opcode, &desc->datalen, &desc->retval,
&desc->cookie_high, &desc->cookie_low, &desc->cookie_high, &desc->cookie_low,
&desc->params.internal.param0, &desc->params.generic.param0,
&desc->params.internal.param1, &desc->params.generic.param1,
&desc->params.internal.param2, &desc->params.generic.addr_high,
&desc->params.internal.param3); &desc->params.generic.addr_low);
if (cnt != 10) { if (cnt != 10) {
dev_info(&pf->pdev->dev, dev_info(&pf->pdev->dev,
"send aq_cmd: bad command string, cnt=%d\n", "send aq_cmd: bad command string, cnt=%d\n",
@ -1307,19 +1307,19 @@ static ssize_t i40e_dbg_command_write(struct file *filp,
"AQ desc WB 0x%04x 0x%04x 0x%04x 0x%04x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", "AQ desc WB 0x%04x 0x%04x 0x%04x 0x%04x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
desc->flags, desc->opcode, desc->datalen, desc->retval, desc->flags, desc->opcode, desc->datalen, desc->retval,
desc->cookie_high, desc->cookie_low, desc->cookie_high, desc->cookie_low,
desc->params.internal.param0, desc->params.generic.param0,
desc->params.internal.param1, desc->params.generic.param1,
desc->params.internal.param2, desc->params.generic.addr_high,
desc->params.internal.param3); desc->params.generic.addr_low);
kfree(desc); kfree(desc);
desc = NULL; desc = NULL;
} else if (strncmp(cmd_buf, "send indirect aq_cmd", 20) == 0) { } else if (strncmp(cmd_buf, "send indirect aq_cmd", 20) == 0) {
struct i40e_aq_desc *desc; struct libie_aq_desc *desc;
u16 buffer_len; u16 buffer_len;
u8 *buff; u8 *buff;
int ret; int ret;
desc = kzalloc(sizeof(struct i40e_aq_desc), GFP_KERNEL); desc = kzalloc(sizeof(*desc), GFP_KERNEL);
if (!desc) if (!desc)
goto command_write_done; goto command_write_done;
cnt = sscanf(&cmd_buf[20], cnt = sscanf(&cmd_buf[20],
@ -1327,10 +1327,10 @@ static ssize_t i40e_dbg_command_write(struct file *filp,
&desc->flags, &desc->flags,
&desc->opcode, &desc->datalen, &desc->retval, &desc->opcode, &desc->datalen, &desc->retval,
&desc->cookie_high, &desc->cookie_low, &desc->cookie_high, &desc->cookie_low,
&desc->params.internal.param0, &desc->params.generic.param0,
&desc->params.internal.param1, &desc->params.generic.param1,
&desc->params.internal.param2, &desc->params.generic.addr_high,
&desc->params.internal.param3, &desc->params.generic.addr_low,
&buffer_len); &buffer_len);
if (cnt != 11) { if (cnt != 11) {
dev_info(&pf->pdev->dev, dev_info(&pf->pdev->dev,
@ -1350,7 +1350,7 @@ static ssize_t i40e_dbg_command_write(struct file *filp,
desc = NULL; desc = NULL;
goto command_write_done; goto command_write_done;
} }
desc->flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF); desc->flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);
ret = i40e_asq_send_command(&pf->hw, desc, buff, ret = i40e_asq_send_command(&pf->hw, desc, buff,
buffer_len, NULL); buffer_len, NULL);
if (!ret) { if (!ret) {
@ -1368,10 +1368,10 @@ static ssize_t i40e_dbg_command_write(struct file *filp,
"AQ desc WB 0x%04x 0x%04x 0x%04x 0x%04x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", "AQ desc WB 0x%04x 0x%04x 0x%04x 0x%04x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
desc->flags, desc->opcode, desc->datalen, desc->retval, desc->flags, desc->opcode, desc->datalen, desc->retval,
desc->cookie_high, desc->cookie_low, desc->cookie_high, desc->cookie_low,
desc->params.internal.param0, desc->params.generic.param0,
desc->params.internal.param1, desc->params.generic.param1,
desc->params.internal.param2, desc->params.generic.addr_high,
desc->params.internal.param3); desc->params.generic.addr_low);
print_hex_dump(KERN_INFO, "AQ buffer WB: ", print_hex_dump(KERN_INFO, "AQ buffer WB: ",
DUMP_PREFIX_OFFSET, 16, 1, DUMP_PREFIX_OFFSET, 16, 1,
buff, buffer_len, true); buff, buffer_len, true);

14
drivers/net/ethernet/intel/i40e/i40e_ethtool.c
View File

@ -1918,13 +1918,13 @@ static int i40e_get_eeprom(struct net_device *netdev,
ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len,
(u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
last, NULL); last, NULL);
if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { if (ret_val && hw->aq.asq_last_status == LIBIE_AQ_RC_EPERM) {
dev_info(&pf->pdev->dev, dev_info(&pf->pdev->dev,
"read NVM failed, invalid offset 0x%x\n", "read NVM failed, invalid offset 0x%x\n",
offset); offset);
break; break;
} else if (ret_val && } else if (ret_val &&
hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { hw->aq.asq_last_status == LIBIE_AQ_RC_EACCES) {
dev_info(&pf->pdev->dev, dev_info(&pf->pdev->dev,
"read NVM failed, access, offset 0x%x\n", "read NVM failed, access, offset 0x%x\n",
offset); offset);
@ -5249,9 +5249,9 @@ static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
DECLARE_BITMAP(orig_flags, I40E_PF_FLAGS_NBITS); DECLARE_BITMAP(orig_flags, I40E_PF_FLAGS_NBITS);
DECLARE_BITMAP(new_flags, I40E_PF_FLAGS_NBITS); DECLARE_BITMAP(new_flags, I40E_PF_FLAGS_NBITS);
struct i40e_netdev_priv *np = netdev_priv(dev); struct i40e_netdev_priv *np = netdev_priv(dev);
enum i40e_admin_queue_err adq_err;
struct i40e_vsi *vsi = np->vsi; struct i40e_vsi *vsi = np->vsi;
struct i40e_pf *pf = vsi->back; struct i40e_pf *pf = vsi->back;
enum libie_aq_err adq_err;
u32 reset_needed = 0; u32 reset_needed = 0;
int status; int status;
u32 i, j; u32 i, j;
@ -5371,7 +5371,7 @@ flags_complete:
valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags,
0, NULL); 0, NULL);
if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { if (ret && pf->hw.aq.asq_last_status != LIBIE_AQ_RC_ESRCH) {
dev_info(&pf->pdev->dev, dev_info(&pf->pdev->dev,
"couldn't set switch config bits, err %pe aq_err %s\n", "couldn't set switch config bits, err %pe aq_err %s\n",
ERR_PTR(ret), ERR_PTR(ret),
@ -5438,16 +5438,16 @@ flags_complete:
if (status) { if (status) {
adq_err = pf->hw.aq.asq_last_status; adq_err = pf->hw.aq.asq_last_status;
switch (adq_err) { switch (adq_err) {
case I40E_AQ_RC_EEXIST: case LIBIE_AQ_RC_EEXIST:
dev_warn(&pf->pdev->dev, dev_warn(&pf->pdev->dev,
"FW LLDP agent is already running\n"); "FW LLDP agent is already running\n");
reset_needed = 0; reset_needed = 0;
break; break;
case I40E_AQ_RC_EPERM: case LIBIE_AQ_RC_EPERM:
dev_warn(&pf->pdev->dev, dev_warn(&pf->pdev->dev,
"Device configuration forbids SW from starting the LLDP agent.\n"); "Device configuration forbids SW from starting the LLDP agent.\n");
return -EINVAL; return -EINVAL;
case I40E_AQ_RC_EAGAIN: case LIBIE_AQ_RC_EAGAIN:
dev_warn(&pf->pdev->dev, dev_warn(&pf->pdev->dev,
"Stop FW LLDP agent command is still being processed, please try again in a second.\n"); "Stop FW LLDP agent command is still being processed, please try again in a second.\n");
return -EBUSY; return -EBUSY;

31
drivers/net/ethernet/intel/i40e/i40e_main.c
View File

@ -2340,14 +2340,14 @@ void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
int num_del, int *retval) int num_del, int *retval)
{ {
struct i40e_hw *hw = &vsi->back->hw; struct i40e_hw *hw = &vsi->back->hw;
enum i40e_admin_queue_err aq_status; enum libie_aq_err aq_status;
int aq_ret; int aq_ret;
aq_ret = i40e_aq_remove_macvlan_v2(hw, vsi->seid, list, num_del, NULL, aq_ret = i40e_aq_remove_macvlan_v2(hw, vsi->seid, list, num_del, NULL,
&aq_status); &aq_status);
/* Explicitly ignore and do not report when firmware returns ENOENT */ /* Explicitly ignore and do not report when firmware returns ENOENT */
if (aq_ret && !(aq_status == I40E_AQ_RC_ENOENT)) { if (aq_ret && !(aq_status == LIBIE_AQ_RC_ENOENT)) {
*retval = -EIO; *retval = -EIO;
dev_info(&vsi->back->pdev->dev, dev_info(&vsi->back->pdev->dev,
"ignoring delete macvlan error on %s, err %pe, aq_err %s\n", "ignoring delete macvlan error on %s, err %pe, aq_err %s\n",
@ -2375,7 +2375,7 @@ void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
int num_add) int num_add)
{ {
struct i40e_hw *hw = &vsi->back->hw; struct i40e_hw *hw = &vsi->back->hw;
enum i40e_admin_queue_err aq_status; enum libie_aq_err aq_status;
int fcnt; int fcnt;
i40e_aq_add_macvlan_v2(hw, vsi->seid, list, num_add, NULL, &aq_status); i40e_aq_add_macvlan_v2(hw, vsi->seid, list, num_add, NULL, &aq_status);
@ -5997,8 +5997,8 @@ int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
**/ **/
static void i40e_remove_queue_channels(struct i40e_vsi *vsi) static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
{ {
enum i40e_admin_queue_err last_aq_status;
struct i40e_cloud_filter *cfilter; struct i40e_cloud_filter *cfilter;
enum libie_aq_err last_aq_status;
struct i40e_channel *ch, *ch_tmp; struct i40e_channel *ch, *ch_tmp;
struct i40e_pf *pf = vsi->back; struct i40e_pf *pf = vsi->back;
struct hlist_node *node; struct hlist_node *node;
@ -6539,7 +6539,7 @@ static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags, ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
pf->last_sw_conf_valid_flags, pf->last_sw_conf_valid_flags,
mode, NULL); mode, NULL);
if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH) if (ret && hw->aq.asq_last_status != LIBIE_AQ_RC_ESRCH)
dev_err(&pf->pdev->dev, dev_err(&pf->pdev->dev,
"couldn't set switch config bits, err %pe aq_err %s\n", "couldn't set switch config bits, err %pe aq_err %s\n",
ERR_PTR(ret), ERR_PTR(ret),
@ -7214,7 +7214,7 @@ static int i40e_init_pf_dcb(struct i40e_pf *pf)
dev_dbg(&pf->pdev->dev, dev_dbg(&pf->pdev->dev,
"DCBX offload is supported for this PF.\n"); "DCBX offload is supported for this PF.\n");
} }
} else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) { } else if (pf->hw.aq.asq_last_status == LIBIE_AQ_RC_EPERM) {
dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n"); dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
set_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags); set_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags);
} else { } else {
@ -9419,8 +9419,7 @@ bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
static int i40e_handle_lldp_event(struct i40e_pf *pf, static int i40e_handle_lldp_event(struct i40e_pf *pf,
struct i40e_arq_event_info *e) struct i40e_arq_event_info *e)
{ {
struct i40e_aqc_lldp_get_mib *mib = struct i40e_aqc_lldp_get_mib *mib = libie_aq_raw(&e->desc);
(struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
struct i40e_hw *hw = &pf->hw; struct i40e_hw *hw = &pf->hw;
struct i40e_dcbx_config tmp_dcbx_cfg; struct i40e_dcbx_config tmp_dcbx_cfg;
bool need_reconfig = false; bool need_reconfig = false;
@ -9559,8 +9558,7 @@ void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
static void i40e_handle_lan_overflow_event(struct i40e_pf *pf, static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
struct i40e_arq_event_info *e) struct i40e_arq_event_info *e)
{ {
struct i40e_aqc_lan_overflow *data = struct i40e_aqc_lan_overflow *data = libie_aq_raw(&e->desc);
(struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
u32 queue = le32_to_cpu(data->prtdcb_rupto); u32 queue = le32_to_cpu(data->prtdcb_rupto);
u32 qtx_ctl = le32_to_cpu(data->otx_ctl); u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
struct i40e_hw *hw = &pf->hw; struct i40e_hw *hw = &pf->hw;
@ -10080,8 +10078,7 @@ static void i40e_reset_subtask(struct i40e_pf *pf)
static void i40e_handle_link_event(struct i40e_pf *pf, static void i40e_handle_link_event(struct i40e_pf *pf,
struct i40e_arq_event_info *e) struct i40e_arq_event_info *e)
{ {
struct i40e_aqc_get_link_status *status = struct i40e_aqc_get_link_status *status = libie_aq_raw(&e->desc);
(struct i40e_aqc_get_link_status *)&e->desc.params.raw;
/* Do a new status request to re-enable LSE reporting /* Do a new status request to re-enable LSE reporting
* and load new status information into the hw struct * and load new status information into the hw struct
@ -10453,12 +10450,12 @@ static int i40e_reconstitute_veb(struct i40e_veb *veb)
static int i40e_get_capabilities(struct i40e_pf *pf, static int i40e_get_capabilities(struct i40e_pf *pf,
enum i40e_admin_queue_opc list_type) enum i40e_admin_queue_opc list_type)
{ {
struct i40e_aqc_list_capabilities_element_resp *cap_buf; struct libie_aqc_list_caps_elem *cap_buf;
u16 data_size; u16 data_size;
int buf_len; int buf_len;
int err; int err;
buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp); buf_len = 40 * sizeof(struct libie_aqc_list_caps_elem);
do { do {
cap_buf = kzalloc(buf_len, GFP_KERNEL); cap_buf = kzalloc(buf_len, GFP_KERNEL);
if (!cap_buf) if (!cap_buf)
@ -10471,10 +10468,10 @@ static int i40e_get_capabilities(struct i40e_pf *pf,
/* data loaded, buffer no longer needed */ /* data loaded, buffer no longer needed */
kfree(cap_buf); kfree(cap_buf);
if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) { if (pf->hw.aq.asq_last_status == LIBIE_AQ_RC_ENOMEM) {
/* retry with a larger buffer */ /* retry with a larger buffer */
buf_len = data_size; buf_len = data_size;
} else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK || err) { } else if (pf->hw.aq.asq_last_status != LIBIE_AQ_RC_OK || err) {
dev_info(&pf->pdev->dev, dev_info(&pf->pdev->dev,
"capability discovery failed, err %pe aq_err %s\n", "capability discovery failed, err %pe aq_err %s\n",
ERR_PTR(err), ERR_PTR(err),
@ -15029,7 +15026,7 @@ static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acqui
valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0, ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
NULL); NULL);
if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { if (ret && pf->hw.aq.asq_last_status != LIBIE_AQ_RC_ESRCH) {
dev_info(&pf->pdev->dev, dev_info(&pf->pdev->dev,
"couldn't set switch config bits, err %pe aq_err %s\n", "couldn't set switch config bits, err %pe aq_err %s\n",
ERR_PTR(ret), ERR_PTR(ret),

16
drivers/net/ethernet/intel/i40e/i40e_nvm.c
View File

@ -997,7 +997,7 @@ static int i40e_nvmupd_exec_aq(struct i40e_hw *hw,
u8 *bytes, int *perrno) u8 *bytes, int *perrno)
{ {
struct i40e_asq_cmd_details cmd_details; struct i40e_asq_cmd_details cmd_details;
struct i40e_aq_desc *aq_desc; struct libie_aq_desc *aq_desc;
u32 buff_size = 0; u32 buff_size = 0;
u8 *buff = NULL; u8 *buff = NULL;
u32 aq_desc_len; u32 aq_desc_len;
@ -1011,7 +1011,7 @@ static int i40e_nvmupd_exec_aq(struct i40e_hw *hw,
memset(&cmd_details, 0, sizeof(cmd_details)); memset(&cmd_details, 0, sizeof(cmd_details));
cmd_details.wb_desc = &hw->nvm_wb_desc; cmd_details.wb_desc = &hw->nvm_wb_desc;
aq_desc_len = sizeof(struct i40e_aq_desc); aq_desc_len = sizeof(struct libie_aq_desc);
memset(&hw->nvm_wb_desc, 0, aq_desc_len); memset(&hw->nvm_wb_desc, 0, aq_desc_len);
/* get the aq descriptor */ /* get the aq descriptor */
@ -1022,7 +1022,7 @@ static int i40e_nvmupd_exec_aq(struct i40e_hw *hw,
*perrno = -EINVAL; *perrno = -EINVAL;
return -EINVAL; return -EINVAL;
} }
aq_desc = (struct i40e_aq_desc *)bytes; aq_desc = (struct libie_aq_desc *)bytes;
/* if data buffer needed, make sure it's ready */ /* if data buffer needed, make sure it's ready */
aq_data_len = cmd->data_size - aq_desc_len; aq_data_len = cmd->data_size - aq_desc_len;
@ -1087,7 +1087,7 @@ static int i40e_nvmupd_get_aq_result(struct i40e_hw *hw,
i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__); i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__);
aq_desc_len = sizeof(struct i40e_aq_desc); aq_desc_len = sizeof(struct libie_aq_desc);
aq_total_len = aq_desc_len + le16_to_cpu(hw->nvm_wb_desc.datalen); aq_total_len = aq_desc_len + le16_to_cpu(hw->nvm_wb_desc.datalen);
/* check offset range */ /* check offset range */
@ -1154,7 +1154,7 @@ static int i40e_nvmupd_get_aq_event(struct i40e_hw *hw,
i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__); i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__);
aq_desc_len = sizeof(struct i40e_aq_desc); aq_desc_len = sizeof(struct libie_aq_desc);
aq_total_len = aq_desc_len + le16_to_cpu(hw->nvm_aq_event_desc.datalen); aq_total_len = aq_desc_len + le16_to_cpu(hw->nvm_aq_event_desc.datalen);
/* check copylength range */ /* check copylength range */
@ -1442,7 +1442,7 @@ retry:
* so here we try to reacquire the semaphore then retry the write. * so here we try to reacquire the semaphore then retry the write.
* We only do one retry, then give up. * We only do one retry, then give up.
*/ */
if (status && hw->aq.asq_last_status == I40E_AQ_RC_EBUSY && if (status && hw->aq.asq_last_status == LIBIE_AQ_RC_EBUSY &&
!retry_attempt) { !retry_attempt) {
u32 old_asq_status = hw->aq.asq_last_status; u32 old_asq_status = hw->aq.asq_last_status;
int old_status = status; int old_status = status;
@ -1628,9 +1628,9 @@ void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw)
* @desc: AdminQ descriptor * @desc: AdminQ descriptor
**/ **/
void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode, void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode,
struct i40e_aq_desc *desc) struct libie_aq_desc *desc)
{ {
u32 aq_desc_len = sizeof(struct i40e_aq_desc); u32 aq_desc_len = sizeof(struct libie_aq_desc);
if (opcode == hw->nvm_wait_opcode) { if (opcode == hw->nvm_wait_opcode) {
memcpy(&hw->nvm_aq_event_desc, desc, aq_desc_len); memcpy(&hw->nvm_aq_event_desc, desc, aq_desc_len);

16
drivers/net/ethernet/intel/i40e/i40e_prototype.h
View File

@ -23,22 +23,22 @@ int i40e_clean_arq_element(struct i40e_hw *hw,
struct i40e_arq_event_info *e, struct i40e_arq_event_info *e,
u16 *events_pending); u16 *events_pending);
int int
i40e_asq_send_command(struct i40e_hw *hw, struct i40e_aq_desc *desc, i40e_asq_send_command(struct i40e_hw *hw, struct libie_aq_desc *desc,
void *buff, /* can be NULL */ u16 buff_size, void *buff, /* can be NULL */ u16 buff_size,
struct i40e_asq_cmd_details *cmd_details); struct i40e_asq_cmd_details *cmd_details);
int int
i40e_asq_send_command_atomic(struct i40e_hw *hw, struct i40e_aq_desc *desc, i40e_asq_send_command_atomic(struct i40e_hw *hw, struct libie_aq_desc *desc,
void *buff, /* can be NULL */ u16 buff_size, void *buff, /* can be NULL */ u16 buff_size,
struct i40e_asq_cmd_details *cmd_details, struct i40e_asq_cmd_details *cmd_details,
bool is_atomic_context); bool is_atomic_context);
int int
i40e_asq_send_command_atomic_v2(struct i40e_hw *hw, i40e_asq_send_command_atomic_v2(struct i40e_hw *hw,
struct i40e_aq_desc *desc, struct libie_aq_desc *desc,
void *buff, /* can be NULL */ void *buff, /* can be NULL */
u16 buff_size, u16 buff_size,
struct i40e_asq_cmd_details *cmd_details, struct i40e_asq_cmd_details *cmd_details,
bool is_atomic_context, bool is_atomic_context,
enum i40e_admin_queue_err *aq_status); enum libie_aq_err *aq_status);
/* debug function for adminq */ /* debug function for adminq */
void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask,
@ -46,7 +46,7 @@ void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask,
bool i40e_check_asq_alive(struct i40e_hw *hw); bool i40e_check_asq_alive(struct i40e_hw *hw);
int i40e_aq_queue_shutdown(struct i40e_hw *hw, bool unloading); int i40e_aq_queue_shutdown(struct i40e_hw *hw, bool unloading);
const char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err); const char *i40e_aq_str(struct i40e_hw *hw, enum libie_aq_err aq_err);
int i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 seid, int i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 seid,
bool pf_lut, u8 *lut, u16 lut_size); bool pf_lut, u8 *lut, u16 lut_size);
@ -155,7 +155,7 @@ int
i40e_aq_add_macvlan_v2(struct i40e_hw *hw, u16 seid, i40e_aq_add_macvlan_v2(struct i40e_hw *hw, u16 seid,
struct i40e_aqc_add_macvlan_element_data *mv_list, struct i40e_aqc_add_macvlan_element_data *mv_list,
u16 count, struct i40e_asq_cmd_details *cmd_details, u16 count, struct i40e_asq_cmd_details *cmd_details,
enum i40e_admin_queue_err *aq_status); enum libie_aq_err *aq_status);
int i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 vsi_id, int i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 vsi_id,
struct i40e_aqc_remove_macvlan_element_data *mv_list, struct i40e_aqc_remove_macvlan_element_data *mv_list,
u16 count, struct i40e_asq_cmd_details *cmd_details); u16 count, struct i40e_asq_cmd_details *cmd_details);
@ -163,7 +163,7 @@ int
i40e_aq_remove_macvlan_v2(struct i40e_hw *hw, u16 seid, i40e_aq_remove_macvlan_v2(struct i40e_hw *hw, u16 seid,
struct i40e_aqc_remove_macvlan_element_data *mv_list, struct i40e_aqc_remove_macvlan_element_data *mv_list,
u16 count, struct i40e_asq_cmd_details *cmd_details, u16 count, struct i40e_asq_cmd_details *cmd_details,
enum i40e_admin_queue_err *aq_status); enum libie_aq_err *aq_status);
int i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid, int i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,
u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen, u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,
@ -339,7 +339,7 @@ int i40e_nvmupd_command(struct i40e_hw *hw,
struct i40e_nvm_access *cmd, struct i40e_nvm_access *cmd,
u8 *bytes, int *errno); u8 *bytes, int *errno);
void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode, void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode,
struct i40e_aq_desc *desc); struct libie_aq_desc *desc);
void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw); void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw);
void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status); void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status);

6
drivers/net/ethernet/intel/i40e/i40e_type.h
View File

@ -24,7 +24,7 @@
/* forward declaration */ /* forward declaration */
struct i40e_hw; struct i40e_hw;
typedef void (*I40E_ADMINQ_CALLBACK)(struct i40e_hw *, struct i40e_aq_desc *); typedef void (*I40E_ADMINQ_CALLBACK)(struct i40e_hw *, struct libie_aq_desc *);
/* Data type manipulation macros. */ /* Data type manipulation macros. */
@ -555,8 +555,8 @@ struct i40e_hw {
/* state of nvm update process */ /* state of nvm update process */
enum i40e_nvmupd_state nvmupd_state; enum i40e_nvmupd_state nvmupd_state;
struct i40e_aq_desc nvm_wb_desc; struct libie_aq_desc nvm_wb_desc;
struct i40e_aq_desc nvm_aq_event_desc; struct libie_aq_desc nvm_aq_event_desc;
struct i40e_virt_mem nvm_buff; struct i40e_virt_mem nvm_buff;
bool nvm_release_on_done; bool nvm_release_on_done;
u16 nvm_wait_opcode; u16 nvm_wait_opcode;

4
drivers/net/ethernet/intel/ice/ice_main.c
View File

@ -7951,6 +7951,10 @@ const char *ice_aq_str(enum libie_aq_err aq_err)
return "ICE_AQ_RC_EBADMAN"; return "ICE_AQ_RC_EBADMAN";
case LIBIE_AQ_RC_EBADBUF: case LIBIE_AQ_RC_EBADBUF:
return "ICE_AQ_RC_EBADBUF"; return "ICE_AQ_RC_EBADBUF";
case LIBIE_AQ_RC_EIO:
return "ICE_AQ_RC_EIO";
case LIBIE_AQ_RC_EACCES:
return "ICE_AQ_RC_EACCES";
} }
return "ICE_AQ_RC_UNKNOWN"; return "ICE_AQ_RC_UNKNOWN";

17
include/linux/net/intel/libie/adminq.h
View File

@ -145,17 +145,26 @@ struct libie_aqc_list_caps {
LIBIE_CHECK_STRUCT_LEN(16, libie_aqc_list_caps); LIBIE_CHECK_STRUCT_LEN(16, libie_aqc_list_caps);
/* Device/Function buffer entry, repeated per reported capability */ /* Device/Function buffer entry, repeated per reported capability */
#define LIBIE_AQC_CAPS_SWITCH_MODE 0x0001
#define LIBIE_AQC_CAPS_MNG_MODE 0x0002
#define LIBIE_AQC_CAPS_NPAR_ACTIVE 0x0003
#define LIBIE_AQC_CAPS_OS2BMC_CAP 0x0004
#define LIBIE_AQC_CAPS_VALID_FUNCTIONS 0x0005 #define LIBIE_AQC_CAPS_VALID_FUNCTIONS 0x0005
#define LIBIE_AQC_MAX_VALID_FUNCTIONS 0x8 #define LIBIE_AQC_MAX_VALID_FUNCTIONS 0x8
#define LIBIE_AQC_CAPS_SRIOV 0x0012 #define LIBIE_AQC_CAPS_SRIOV 0x0012
#define LIBIE_AQC_CAPS_VF 0x0013 #define LIBIE_AQC_CAPS_VF 0x0013
#define LIBIE_AQC_CAPS_VMDQ 0x0014 #define LIBIE_AQC_CAPS_VMDQ 0x0014
#define LIBIE_AQC_CAPS_8021QBG 0x0015
#define LIBIE_AQC_CAPS_8021QBR 0x0016
#define LIBIE_AQC_CAPS_VSI 0x0017 #define LIBIE_AQC_CAPS_VSI 0x0017
#define LIBIE_AQC_CAPS_DCB 0x0018 #define LIBIE_AQC_CAPS_DCB 0x0018
#define LIBIE_AQC_CAPS_FCOE 0x0021
#define LIBIE_AQC_CAPS_ISCSI 0x0022
#define LIBIE_AQC_CAPS_RSS 0x0040 #define LIBIE_AQC_CAPS_RSS 0x0040
#define LIBIE_AQC_CAPS_RXQS 0x0041 #define LIBIE_AQC_CAPS_RXQS 0x0041
#define LIBIE_AQC_CAPS_TXQS 0x0042 #define LIBIE_AQC_CAPS_TXQS 0x0042
#define LIBIE_AQC_CAPS_MSIX 0x0043 #define LIBIE_AQC_CAPS_MSIX 0x0043
#define LIBIE_AQC_CAPS_VF_MSIX 0x0044
#define LIBIE_AQC_CAPS_FD 0x0045 #define LIBIE_AQC_CAPS_FD 0x0045
#define LIBIE_AQC_CAPS_1588 0x0046 #define LIBIE_AQC_CAPS_1588 0x0046
#define LIBIE_AQC_CAPS_MAX_MTU 0x0047 #define LIBIE_AQC_CAPS_MAX_MTU 0x0047
@ -166,6 +175,10 @@ LIBIE_CHECK_STRUCT_LEN(16, libie_aqc_list_caps);
#define LIBIE_AQC_CAPS_NET_VER 0x004C #define LIBIE_AQC_CAPS_NET_VER 0x004C
#define LIBIE_AQC_CAPS_PENDING_NET_VER 0x004D #define LIBIE_AQC_CAPS_PENDING_NET_VER 0x004D
#define LIBIE_AQC_CAPS_RDMA 0x0051 #define LIBIE_AQC_CAPS_RDMA 0x0051
#define LIBIE_AQC_CAPS_LED 0x0061
#define LIBIE_AQC_CAPS_SDP 0x0062
#define LIBIE_AQC_CAPS_MDIO 0x0063
#define LIBIE_AQC_CAPS_WSR_PROT 0x0064
#define LIBIE_AQC_CAPS_SENSOR_READING 0x0067 #define LIBIE_AQC_CAPS_SENSOR_READING 0x0067
#define LIBIE_AQC_INLINE_IPSEC 0x0070 #define LIBIE_AQC_INLINE_IPSEC 0x0070
#define LIBIE_AQC_CAPS_NUM_ENABLED_PORTS 0x0072 #define LIBIE_AQC_CAPS_NUM_ENABLED_PORTS 0x0072
@ -181,6 +194,8 @@ LIBIE_CHECK_STRUCT_LEN(16, libie_aqc_list_caps);
#define LIBIE_AQC_CAPS_FW_LAG_SUPPORT 0x0092 #define LIBIE_AQC_CAPS_FW_LAG_SUPPORT 0x0092
#define LIBIE_AQC_BIT_ROCEV2_LAG 0x01 #define LIBIE_AQC_BIT_ROCEV2_LAG 0x01
#define LIBIE_AQC_BIT_SRIOV_LAG 0x02 #define LIBIE_AQC_BIT_SRIOV_LAG 0x02
#define LIBIE_AQC_CAPS_FLEX10 0x00F1
#define LIBIE_AQC_CAPS_CEM 0x00F2
/** /**
* struct libie_aqc_list_caps_elem - Getting list of caps elements * struct libie_aqc_list_caps_elem - Getting list of caps elements
@ -266,8 +281,10 @@ enum libie_aq_err {
LIBIE_AQ_RC_EPERM = 1, /* Operation not permitted */ LIBIE_AQ_RC_EPERM = 1, /* Operation not permitted */
LIBIE_AQ_RC_ENOENT = 2, /* No such element */ LIBIE_AQ_RC_ENOENT = 2, /* No such element */
LIBIE_AQ_RC_ESRCH = 3, /* Bad opcode */ LIBIE_AQ_RC_ESRCH = 3, /* Bad opcode */
LIBIE_AQ_RC_EIO = 5, /* I/O error */
LIBIE_AQ_RC_EAGAIN = 8, /* Try again */ LIBIE_AQ_RC_EAGAIN = 8, /* Try again */
LIBIE_AQ_RC_ENOMEM = 9, /* Out of memory */ LIBIE_AQ_RC_ENOMEM = 9, /* Out of memory */
LIBIE_AQ_RC_EACCES = 10, /* Permission denied */
LIBIE_AQ_RC_EBUSY = 12, /* Device or resource busy */ LIBIE_AQ_RC_EBUSY = 12, /* Device or resource busy */
LIBIE_AQ_RC_EEXIST = 13, /* Object already exists */ LIBIE_AQ_RC_EEXIST = 13, /* Object already exists */
LIBIE_AQ_RC_EINVAL = 14, /* Invalid argument */ LIBIE_AQ_RC_EINVAL = 14, /* Invalid argument */