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spi: Fixes for v6.15
A fairly small pile of fixes, plus one new compatible string addition to the Synopsis driver for a new platform. The most notable thing is the fix for divide by zeros in spi-mem if an operation has no dummy bytes. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmgVU+4ACgkQJNaLcl1U h9DtiQf/WFONuTRhVXKO7yn3W3ZPP0zWi9RjKH/n8ZW7R6My7y3XwYraPKHsCYvf xr856tK0hsY2k8Gg7zvE0oCAu+K4kSSV6IXumbj55MMWameermAL8WXgFl/yhFvT nuU6Rp7EgOY1sl+UUChggb1Kr1xz5MMbrnuECKynFpzxx0RGNymrLNHcC2pl2yF/ nSBwMu2pWTh8SZUoxxDqfH3PQvpyq6i7V28zZ/J9XHz7GhfVwjA6U1xZlXjUuqyq zP4oABUmktqCaySgRM3aj5mhoIfG/Ywxz8jAt9+hE/Bpo7a5tpxMBVzhBfbPYT3g x7vYsAJ9yMw9DIdOykuyZ/pcuKPbdg== =kk6A -----END PGP SIGNATURE----- Merge tag 'spi-fix-v6.15-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fixes from Mark Brown: "A fairly small pile of fixes, plus one new compatible string addition to the Synopsis driver for a new platform. The most notable thing is the fix for divide by zeros in spi-mem if an operation has no dummy bytes" * tag 'spi-fix-v6.15-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: tegra114: Don't fail set_cs_timing when delays are zero spi: spi-qpic-snand: fix NAND_READ_LOCATION_2 register handling spi: spi-mem: Add fix to avoid divide error spi: dt-bindings: snps,dw-apb-ssi: Add compatible for SOPHGO SG2042 SoC spi: dt-bindings: snps,dw-apb-ssi: Merge duplicate compatible entry spi: spi-qpic-snand: propagate errors from qcom_spi_block_erase() spi: stm32-ospi: Fix an error handling path in stm32_ospi_probe()
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commit
95d3481af6
@ -56,19 +56,18 @@ properties:
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enum:
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enum:
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- snps,dw-apb-ssi
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- snps,dw-apb-ssi
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- snps,dwc-ssi-1.01a
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- snps,dwc-ssi-1.01a
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- description: Microsemi Ocelot/Jaguar2 SoC SPI Controller
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items:
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- enum:
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- mscc,ocelot-spi
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- mscc,jaguar2-spi
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- const: snps,dw-apb-ssi
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- description: Microchip Sparx5 SoC SPI Controller
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- description: Microchip Sparx5 SoC SPI Controller
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const: microchip,sparx5-spi
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const: microchip,sparx5-spi
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- description: Amazon Alpine SPI Controller
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- description: Amazon Alpine SPI Controller
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const: amazon,alpine-dw-apb-ssi
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const: amazon,alpine-dw-apb-ssi
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- description: Renesas RZ/N1 SPI Controller
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- description: Vendor controllers which use snps,dw-apb-ssi as fallback
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items:
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items:
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- const: renesas,rzn1-spi
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- enum:
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- mscc,ocelot-spi
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- mscc,jaguar2-spi
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- renesas,rzn1-spi
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- sophgo,sg2042-spi
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- thead,th1520-spi
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- const: snps,dw-apb-ssi
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- const: snps,dw-apb-ssi
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- description: Intel Keem Bay SPI Controller
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- description: Intel Keem Bay SPI Controller
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const: intel,keembay-ssi
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const: intel,keembay-ssi
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@ -88,10 +87,6 @@ properties:
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- renesas,r9a06g032-spi # RZ/N1D
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- renesas,r9a06g032-spi # RZ/N1D
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- renesas,r9a06g033-spi # RZ/N1S
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- renesas,r9a06g033-spi # RZ/N1S
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- const: renesas,rzn1-spi # RZ/N1
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- const: renesas,rzn1-spi # RZ/N1
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- description: T-HEAD TH1520 SoC SPI Controller
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items:
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- const: thead,th1520-spi
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- const: snps,dw-apb-ssi
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reg:
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reg:
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minItems: 1
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minItems: 1
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@ -596,7 +596,11 @@ u64 spi_mem_calc_op_duration(struct spi_mem_op *op)
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ns_per_cycles = 1000000000 / op->max_freq;
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ns_per_cycles = 1000000000 / op->max_freq;
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ncycles += ((op->cmd.nbytes * 8) / op->cmd.buswidth) / (op->cmd.dtr ? 2 : 1);
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ncycles += ((op->cmd.nbytes * 8) / op->cmd.buswidth) / (op->cmd.dtr ? 2 : 1);
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ncycles += ((op->addr.nbytes * 8) / op->addr.buswidth) / (op->addr.dtr ? 2 : 1);
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ncycles += ((op->addr.nbytes * 8) / op->addr.buswidth) / (op->addr.dtr ? 2 : 1);
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ncycles += ((op->dummy.nbytes * 8) / op->dummy.buswidth) / (op->dummy.dtr ? 2 : 1);
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/* Dummy bytes are optional for some SPI flash memory operations */
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if (op->dummy.nbytes)
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ncycles += ((op->dummy.nbytes * 8) / op->dummy.buswidth) / (op->dummy.dtr ? 2 : 1);
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ncycles += ((op->data.nbytes * 8) / op->data.buswidth) / (op->data.dtr ? 2 : 1);
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ncycles += ((op->data.nbytes * 8) / op->data.buswidth) / (op->data.dtr ? 2 : 1);
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return ncycles * ns_per_cycles;
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return ncycles * ns_per_cycles;
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@ -142,7 +142,7 @@ static void qcom_spi_set_read_loc_first(struct qcom_nand_controller *snandc,
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else if (reg == NAND_READ_LOCATION_1)
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else if (reg == NAND_READ_LOCATION_1)
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snandc->regs->read_location1 = locreg_val;
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snandc->regs->read_location1 = locreg_val;
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else if (reg == NAND_READ_LOCATION_2)
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else if (reg == NAND_READ_LOCATION_2)
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snandc->regs->read_location1 = locreg_val;
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snandc->regs->read_location2 = locreg_val;
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else if (reg == NAND_READ_LOCATION_3)
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else if (reg == NAND_READ_LOCATION_3)
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snandc->regs->read_location3 = locreg_val;
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snandc->regs->read_location3 = locreg_val;
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}
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}
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@ -1307,8 +1307,7 @@ static int qcom_spi_send_cmdaddr(struct qcom_nand_controller *snandc,
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snandc->qspi->addr1 = cpu_to_le32(s_op.addr1_reg << 16);
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snandc->qspi->addr1 = cpu_to_le32(s_op.addr1_reg << 16);
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snandc->qspi->addr2 = cpu_to_le32(s_op.addr2_reg);
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snandc->qspi->addr2 = cpu_to_le32(s_op.addr2_reg);
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snandc->qspi->cmd = cpu_to_le32(cmd);
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snandc->qspi->cmd = cpu_to_le32(cmd);
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qcom_spi_block_erase(snandc);
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return qcom_spi_block_erase(snandc);
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return 0;
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default:
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default:
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break;
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break;
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}
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}
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@ -960,6 +960,10 @@ err_pm_resume:
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err_pm_enable:
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err_pm_enable:
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pm_runtime_force_suspend(ospi->dev);
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pm_runtime_force_suspend(ospi->dev);
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mutex_destroy(&ospi->lock);
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mutex_destroy(&ospi->lock);
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if (ospi->dma_chtx)
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dma_release_channel(ospi->dma_chtx);
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if (ospi->dma_chrx)
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dma_release_channel(ospi->dma_chrx);
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return ret;
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return ret;
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}
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}
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@ -728,9 +728,9 @@ static int tegra_spi_set_hw_cs_timing(struct spi_device *spi)
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u32 inactive_cycles;
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u32 inactive_cycles;
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u8 cs_state;
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u8 cs_state;
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if (setup->unit != SPI_DELAY_UNIT_SCK ||
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if ((setup->unit && setup->unit != SPI_DELAY_UNIT_SCK) ||
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hold->unit != SPI_DELAY_UNIT_SCK ||
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(hold->unit && hold->unit != SPI_DELAY_UNIT_SCK) ||
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inactive->unit != SPI_DELAY_UNIT_SCK) {
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(inactive->unit && inactive->unit != SPI_DELAY_UNIT_SCK)) {
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dev_err(&spi->dev,
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dev_err(&spi->dev,
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"Invalid delay unit %d, should be SPI_DELAY_UNIT_SCK\n",
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"Invalid delay unit %d, should be SPI_DELAY_UNIT_SCK\n",
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SPI_DELAY_UNIT_SCK);
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SPI_DELAY_UNIT_SCK);
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