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ASoC: cs35l56: Remove SoundWire Clock Divider workaround for CS35L63
Production silicon for CS36L63 has some small differences compared to
pre-production silicon. Remove soundwire clock workaround as no
longer necessary. We don't want to do tricks with low-level clocking
controls if we don't need to.
Fixes: 978858791c
("ASoC: cs35l56: Add initial support for CS35L63 for I2C and SoundWire")
Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com>
Link: https://patch.msgid.link/20250820142209.127575-4-sbinding@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
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@ -393,74 +393,6 @@ static int cs35l56_sdw_update_status(struct sdw_slave *peripheral,
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return 0;
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return 0;
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}
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}
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static int cs35l63_sdw_kick_divider(struct cs35l56_private *cs35l56,
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struct sdw_slave *peripheral)
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{
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unsigned int curr_scale_reg, next_scale_reg;
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int curr_scale, next_scale, ret;
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if (!cs35l56->base.init_done)
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return 0;
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if (peripheral->bus->params.curr_bank) {
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curr_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B1;
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next_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B0;
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} else {
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curr_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B0;
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next_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B1;
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}
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/*
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* Current clock scale value must be different to new value.
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* Modify current to guarantee this. If next still has the dummy
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* value we wrote when it was current, the core code has not set
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* a new scale so restore its original good value
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*/
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curr_scale = sdw_read_no_pm(peripheral, curr_scale_reg);
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if (curr_scale < 0) {
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dev_err(cs35l56->base.dev, "Failed to read current clock scale: %d\n", curr_scale);
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return curr_scale;
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}
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next_scale = sdw_read_no_pm(peripheral, next_scale_reg);
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if (next_scale < 0) {
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dev_err(cs35l56->base.dev, "Failed to read next clock scale: %d\n", next_scale);
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return next_scale;
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}
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if (next_scale == CS35L56_SDW_INVALID_BUS_SCALE) {
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next_scale = cs35l56->old_sdw_clock_scale;
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ret = sdw_write_no_pm(peripheral, next_scale_reg, next_scale);
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if (ret < 0) {
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dev_err(cs35l56->base.dev, "Failed to modify current clock scale: %d\n",
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ret);
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return ret;
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}
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}
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cs35l56->old_sdw_clock_scale = curr_scale;
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ret = sdw_write_no_pm(peripheral, curr_scale_reg, CS35L56_SDW_INVALID_BUS_SCALE);
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if (ret < 0) {
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dev_err(cs35l56->base.dev, "Failed to modify current clock scale: %d\n", ret);
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return ret;
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}
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dev_dbg(cs35l56->base.dev, "Next bus scale: %#x\n", next_scale);
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return 0;
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}
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static int cs35l56_sdw_bus_config(struct sdw_slave *peripheral,
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struct sdw_bus_params *params)
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{
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struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev);
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if ((cs35l56->base.type == 0x63) && (cs35l56->base.rev < 0xa1))
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return cs35l63_sdw_kick_divider(cs35l56, peripheral);
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return 0;
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}
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static int __maybe_unused cs35l56_sdw_clk_stop(struct sdw_slave *peripheral,
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static int __maybe_unused cs35l56_sdw_clk_stop(struct sdw_slave *peripheral,
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enum sdw_clk_stop_mode mode,
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enum sdw_clk_stop_mode mode,
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enum sdw_clk_stop_type type)
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enum sdw_clk_stop_type type)
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@ -476,7 +408,6 @@ static const struct sdw_slave_ops cs35l56_sdw_ops = {
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.read_prop = cs35l56_sdw_read_prop,
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.read_prop = cs35l56_sdw_read_prop,
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.interrupt_callback = cs35l56_sdw_interrupt,
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.interrupt_callback = cs35l56_sdw_interrupt,
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.update_status = cs35l56_sdw_update_status,
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.update_status = cs35l56_sdw_update_status,
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.bus_config = cs35l56_sdw_bus_config,
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#ifdef DEBUG
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#ifdef DEBUG
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.clk_stop = cs35l56_sdw_clk_stop,
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.clk_stop = cs35l56_sdw_clk_stop,
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#endif
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#endif
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@ -20,8 +20,6 @@
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#define CS35L56_SDW_GEN_INT_MASK_1 0xc1
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#define CS35L56_SDW_GEN_INT_MASK_1 0xc1
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#define CS35L56_SDW_INT_MASK_CODEC_IRQ BIT(0)
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#define CS35L56_SDW_INT_MASK_CODEC_IRQ BIT(0)
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#define CS35L56_SDW_INVALID_BUS_SCALE 0xf
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#define CS35L56_RX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
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#define CS35L56_RX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
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#define CS35L56_TX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE \
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#define CS35L56_TX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE \
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| SNDRV_PCM_FMTBIT_S32_LE)
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| SNDRV_PCM_FMTBIT_S32_LE)
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@ -52,7 +50,6 @@ struct cs35l56_private {
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u8 asp_slot_count;
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u8 asp_slot_count;
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bool tdm_mode;
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bool tdm_mode;
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bool sysclk_set;
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bool sysclk_set;
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u8 old_sdw_clock_scale;
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u8 sdw_link_num;
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u8 sdw_link_num;
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u8 sdw_unique_id;
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u8 sdw_unique_id;
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};
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};
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