mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-09-04 20:19:47 +08:00
selftests/powerpc: Check FP/VEC on exception in TM
Add a self test to check if FP/VEC/VSX registers are sane (restored correctly) after a FP/VEC/VSX unavailable exception is caught during a transaction. This test checks all possibilities in a thread regarding the combination of MSR.[FP|VEC] states in a thread and for each scenario raises a FP/VEC/VSX unavailable exception in transactional state, verifying if vs0 and vs32 registers, which are representatives of FP/VEC/VSX reg sets, are not corrupted. Signed-off-by: Gustavo Romero <gromero@linux.vnet.ibm.com> Signed-off-by: Breno Leitao <leitao@debian.org> Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Gustavo Romero
Michael Ellerman
parent
80eff6c484
commit
77fad8bfb1
@ -12,3 +12,4 @@ tm-signal-context-chk-gpr
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tm-signal-context-chk-vmx
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tm-signal-context-chk-vsx
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tm-vmx-unavail
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tm-unavailable
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@ -2,7 +2,7 @@ SIGNAL_CONTEXT_CHK_TESTS := tm-signal-context-chk-gpr tm-signal-context-chk-fpu
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tm-signal-context-chk-vmx tm-signal-context-chk-vsx
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TEST_GEN_PROGS := tm-resched-dscr tm-syscall tm-signal-msr-resv tm-signal-stack \
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tm-vmxcopy tm-fork tm-tar tm-tmspr tm-vmx-unavail \
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tm-vmxcopy tm-fork tm-tar tm-tmspr tm-vmx-unavail tm-unavailable \
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$(SIGNAL_CONTEXT_CHK_TESTS)
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include ../../lib.mk
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@ -16,6 +16,7 @@ $(OUTPUT)/tm-syscall: CFLAGS += -I../../../../../usr/include
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$(OUTPUT)/tm-tmspr: CFLAGS += -pthread
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$(OUTPUT)/tm-vmx-unavail: CFLAGS += -pthread -m64
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$(OUTPUT)/tm-resched-dscr: ../pmu/lib.o
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$(OUTPUT)/tm-unavailable: CFLAGS += -O0 -pthread -m64 -Wno-error=uninitialized -mvsx
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SIGNAL_CONTEXT_CHK_TESTS := $(patsubst %,$(OUTPUT)/%,$(SIGNAL_CONTEXT_CHK_TESTS))
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$(SIGNAL_CONTEXT_CHK_TESTS): tm-signal.S
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371
tools/testing/selftests/powerpc/tm/tm-unavailable.c
Normal file
371
tools/testing/selftests/powerpc/tm/tm-unavailable.c
Normal file
@ -0,0 +1,371 @@
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/*
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* Copyright 2017, Gustavo Romero, Breno Leitao, Cyril Bur, IBM Corp.
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* Licensed under GPLv2.
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*
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* Force FP, VEC and VSX unavailable exception during transaction in all
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* possible scenarios regarding the MSR.FP and MSR.VEC state, e.g. when FP
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* is enable and VEC is disable, when FP is disable and VEC is enable, and
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* so on. Then we check if the restored state is correctly set for the
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* FP and VEC registers to the previous state we set just before we entered
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* in TM, i.e. we check if it corrupts somehow the recheckpointed FP and
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* VEC/Altivec registers on abortion due to an unavailable exception in TM.
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* N.B. In this test we do not test all the FP/Altivec/VSX registers for
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* corruption, but only for registers vs0 and vs32, which are respectively
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* representatives of FP and VEC/Altivec reg sets.
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*/
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#define _GNU_SOURCE
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <inttypes.h>
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#include <stdbool.h>
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#include <pthread.h>
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#include <sched.h>
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#include "tm.h"
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#define DEBUG 0
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/* Unavailable exceptions to test in HTM */
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#define FP_UNA_EXCEPTION 0
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#define VEC_UNA_EXCEPTION 1
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#define VSX_UNA_EXCEPTION 2
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#define NUM_EXCEPTIONS 3
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struct Flags {
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int touch_fp;
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int touch_vec;
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int result;
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int exception;
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} flags;
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bool expecting_failure(void)
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{
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if (flags.touch_fp && flags.exception == FP_UNA_EXCEPTION)
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return false;
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if (flags.touch_vec && flags.exception == VEC_UNA_EXCEPTION)
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return false;
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/*
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* If both FP and VEC are touched it does not mean that touching VSX
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* won't raise an exception. However since FP and VEC state are already
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* correctly loaded, the transaction is not aborted (i.e.
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* treclaimed/trecheckpointed) and MSR.VSX is just set as 1, so a TM
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* failure is not expected also in this case.
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*/
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if ((flags.touch_fp && flags.touch_vec) &&
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flags.exception == VSX_UNA_EXCEPTION)
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return false;
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return true;
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}
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/* Check if failure occurred whilst in transaction. */
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bool is_failure(uint64_t condition_reg)
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{
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/*
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* When failure handling occurs, CR0 is set to 0b1010 (0xa). Otherwise
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* transaction completes without failure and hence reaches out 'tend.'
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* that sets CR0 to 0b0100 (0x4).
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*/
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return ((condition_reg >> 28) & 0xa) == 0xa;
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}
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void *ping(void *input)
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{
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/*
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* Expected values for vs0 and vs32 after a TM failure. They must never
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* change, otherwise they got corrupted.
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*/
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uint64_t high_vs0 = 0x5555555555555555;
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uint64_t low_vs0 = 0xffffffffffffffff;
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uint64_t high_vs32 = 0x5555555555555555;
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uint64_t low_vs32 = 0xffffffffffffffff;
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/* Counter for busy wait */
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uint64_t counter = 0x1ff000000;
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/*
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* Variable to keep a copy of CR register content taken just after we
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* leave the transactional state.
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*/
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uint64_t cr_ = 0;
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/*
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* Wait a bit so thread can get its name "ping". This is not important
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* to reproduce the issue but it's nice to have for systemtap debugging.
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*/
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if (DEBUG)
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sleep(1);
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printf("If MSR.FP=%d MSR.VEC=%d: ", flags.touch_fp, flags.touch_vec);
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if (flags.exception != FP_UNA_EXCEPTION &&
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flags.exception != VEC_UNA_EXCEPTION &&
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flags.exception != VSX_UNA_EXCEPTION) {
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printf("No valid exception specified to test.\n");
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return NULL;
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}
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asm (
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/* Prepare to merge low and high. */
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" mtvsrd 33, %[high_vs0] ;"
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" mtvsrd 34, %[low_vs0] ;"
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/*
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* Adjust VS0 expected value after an TM failure,
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* i.e. vs0 = 0x5555555555555555555FFFFFFFFFFFFFFFF
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*/
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" xxmrghd 0, 33, 34 ;"
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/*
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* Adjust VS32 expected value after an TM failure,
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* i.e. vs32 = 0x5555555555555555555FFFFFFFFFFFFFFFF
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*/
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" xxmrghd 32, 33, 34 ;"
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/*
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* Wait an amount of context switches so load_fp and load_vec
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* overflow and MSR.FP, MSR.VEC, and MSR.VSX become zero (off).
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*/
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" mtctr %[counter] ;"
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/* Decrement CTR branch if CTR non zero. */
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"1: bdnz 1b ;"
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/*
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* Check if we want to touch FP prior to the test in order
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* to set MSR.FP = 1 before provoking an unavailable
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* exception in TM.
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*/
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" cmpldi %[touch_fp], 0 ;"
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" beq no_fp ;"
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" fadd 10, 10, 10 ;"
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"no_fp: ;"
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/*
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* Check if we want to touch VEC prior to the test in order
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* to set MSR.VEC = 1 before provoking an unavailable
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* exception in TM.
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*/
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" cmpldi %[touch_vec], 0 ;"
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" beq no_vec ;"
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" vaddcuw 10, 10, 10 ;"
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"no_vec: ;"
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/*
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* Perhaps it would be a better idea to do the
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* compares outside transactional context and simply
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* duplicate code.
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*/
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" tbegin. ;"
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" beq trans_fail ;"
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/* Do we do FP Unavailable? */
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" cmpldi %[exception], %[ex_fp] ;"
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" bne 1f ;"
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" fadd 10, 10, 10 ;"
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" b done ;"
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/* Do we do VEC Unavailable? */
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"1: cmpldi %[exception], %[ex_vec] ;"
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" bne 2f ;"
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" vaddcuw 10, 10, 10 ;"
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" b done ;"
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/*
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* Not FP or VEC, therefore VSX. Ensure this
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* instruction always generates a VSX Unavailable.
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* ISA 3.0 is tricky here.
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* (xxmrghd will on ISA 2.07 and ISA 3.0)
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*/
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"2: xxmrghd 10, 10, 10 ;"
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"done: tend. ;"
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"trans_fail: ;"
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/* Give values back to C. */
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" mfvsrd %[high_vs0], 0 ;"
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" xxsldwi 3, 0, 0, 2 ;"
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" mfvsrd %[low_vs0], 3 ;"
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" mfvsrd %[high_vs32], 32 ;"
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" xxsldwi 3, 32, 32, 2 ;"
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" mfvsrd %[low_vs32], 3 ;"
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/* Give CR back to C so that it can check what happened. */
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" mfcr %[cr_] ;"
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: [high_vs0] "+r" (high_vs0),
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[low_vs0] "+r" (low_vs0),
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[high_vs32] "=r" (high_vs32),
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[low_vs32] "=r" (low_vs32),
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[cr_] "+r" (cr_)
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: [touch_fp] "r" (flags.touch_fp),
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[touch_vec] "r" (flags.touch_vec),
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[exception] "r" (flags.exception),
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[ex_fp] "i" (FP_UNA_EXCEPTION),
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[ex_vec] "i" (VEC_UNA_EXCEPTION),
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[ex_vsx] "i" (VSX_UNA_EXCEPTION),
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[counter] "r" (counter)
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: "cr0", "ctr", "v10", "vs0", "vs10", "vs3", "vs32", "vs33",
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"vs34", "fr10"
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);
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/*
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* Check if we were expecting a failure and it did not occur by checking
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* CR0 state just after we leave the transaction. Either way we check if
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* vs0 or vs32 got corrupted.
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*/
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if (expecting_failure() && !is_failure(cr_)) {
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printf("\n\tExpecting the transaction to fail, %s",
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"but it didn't\n\t");
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flags.result++;
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}
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/* Check if we were not expecting a failure and a it occurred. */
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if (!expecting_failure() && is_failure(cr_)) {
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printf("\n\tUnexpected transaction failure 0x%02lx\n\t",
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failure_code());
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return (void *) -1;
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}
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/*
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* Check if TM failed due to the cause we were expecting. 0xda is a
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* TM_CAUSE_FAC_UNAV cause, otherwise it's an unexpected cause.
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*/
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if (is_failure(cr_) && !failure_is_unavailable()) {
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printf("\n\tUnexpected failure cause 0x%02lx\n\t",
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failure_code());
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return (void *) -1;
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}
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/* 0x4 is a success and 0xa is a fail. See comment in is_failure(). */
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if (DEBUG)
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printf("CR0: 0x%1lx ", cr_ >> 28);
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/* Check FP (vs0) for the expected value. */
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if (high_vs0 != 0x5555555555555555 || low_vs0 != 0xFFFFFFFFFFFFFFFF) {
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printf("FP corrupted!");
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printf(" high = %#16" PRIx64 " low = %#16" PRIx64 " ",
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high_vs0, low_vs0);
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flags.result++;
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} else
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printf("FP ok ");
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/* Check VEC (vs32) for the expected value. */
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if (high_vs32 != 0x5555555555555555 || low_vs32 != 0xFFFFFFFFFFFFFFFF) {
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printf("VEC corrupted!");
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printf(" high = %#16" PRIx64 " low = %#16" PRIx64,
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high_vs32, low_vs32);
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flags.result++;
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} else
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printf("VEC ok");
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putchar('\n');
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return NULL;
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}
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/* Thread to force context switch */
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void *pong(void *not_used)
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{
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/* Wait thread get its name "pong". */
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if (DEBUG)
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sleep(1);
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/* Classed as an interactive-like thread. */
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while (1)
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sched_yield();
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}
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/* Function that creates a thread and launches the "ping" task. */
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void test_fp_vec(int fp, int vec, pthread_attr_t *attr)
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{
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int retries = 2;
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void *ret_value;
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pthread_t t0;
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flags.touch_fp = fp;
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flags.touch_vec = vec;
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/*
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* Without luck it's possible that the transaction is aborted not due to
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* the unavailable exception caught in the middle as we expect but also,
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* for instance, due to a context switch or due to a KVM reschedule (if
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* it's running on a VM). Thus we try a few times before giving up,
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* checking if the failure cause is the one we expect.
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*/
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do {
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/* Bind 'ping' to CPU 0, as specified in 'attr'. */
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pthread_create(&t0, attr, ping, (void *) &flags);
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pthread_setname_np(t0, "ping");
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pthread_join(t0, &ret_value);
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retries--;
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} while (ret_value != NULL && retries);
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if (!retries) {
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flags.result = 1;
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if (DEBUG)
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printf("All transactions failed unexpectedly\n");
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}
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}
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int main(int argc, char **argv)
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{
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int exception; /* FP = 0, VEC = 1, VSX = 2 */
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pthread_t t1;
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pthread_attr_t attr;
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cpu_set_t cpuset;
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/* Set only CPU 0 in the mask. Both threads will be bound to CPU 0. */
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CPU_ZERO(&cpuset);
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CPU_SET(0, &cpuset);
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/* Init pthread attribute. */
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pthread_attr_init(&attr);
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/* Set CPU 0 mask into the pthread attribute. */
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pthread_attr_setaffinity_np(&attr, sizeof(cpu_set_t), &cpuset);
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pthread_create(&t1, &attr /* Bind 'pong' to CPU 0 */, pong, NULL);
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pthread_setname_np(t1, "pong"); /* Name it for systemtap convenience */
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flags.result = 0;
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for (exception = 0; exception < NUM_EXCEPTIONS; exception++) {
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printf("Checking if FP/VEC registers are sane after");
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if (exception == FP_UNA_EXCEPTION)
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printf(" a FP unavailable exception...\n");
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else if (exception == VEC_UNA_EXCEPTION)
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printf(" a VEC unavailable exception...\n");
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else
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printf(" a VSX unavailable exception...\n");
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flags.exception = exception;
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test_fp_vec(0, 0, &attr);
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test_fp_vec(1, 0, &attr);
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test_fp_vec(0, 1, &attr);
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test_fp_vec(1, 1, &attr);
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}
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if (flags.result > 0) {
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printf("result: failed!\n");
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exit(1);
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} else {
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printf("result: success\n");
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exit(0);
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}
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}
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@ -47,6 +47,11 @@ static inline bool failure_is_syscall(void)
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return (failure_code() & TM_CAUSE_SYSCALL) == TM_CAUSE_SYSCALL;
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}
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static inline bool failure_is_unavailable(void)
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{
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return (failure_code() & TM_CAUSE_FAC_UNAV) == TM_CAUSE_FAC_UNAV;
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}
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static inline bool failure_is_nesting(void)
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{
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return (__builtin_get_texasru() & 0x400000);
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