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Code

ASoC: Intel: boards: use devm_clk_get() unconditionally

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The clock framework was only used in Baytrail, on Cherrytrail
the firmware takes care of the MCLK/plt_clk_3.

With the fix in 'commit d31fd43c0f
("clk: x86: Do not gate clocks enabled by the firmware")'

the firmware-managed clocks are not impacted by enable/disable
requests make at the driver level, and the rates are identical.

Remove all checks for Baytrail and use devm_clk_get()
unconditionally. Tested on Asus T100HA (CHT) and Asus T100TAF (BYT)

Note that the RT5640 and RT5645 machine drivers need to keep some
checks for Valleyview to check for Baytrail-CR.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Acked-By: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Pierre-Louis Bossart 2017-09-08 12:43:52 -05:00 committed by Mark Brown
parent 86cb5dee23
commit 7735bce05a
3 changed files with 13 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
sound/soc/intel/boards/bytcr_rt5640.c
View File

@ -891,7 +891,7 @@ static int snd_byt_rt5640_mc_probe(struct platform_device *pdev)
byt_rt5640_cpu_dai_name; byt_rt5640_cpu_dai_name;
} }
if ((byt_rt5640_quirk & BYT_RT5640_MCLK_EN) && (is_valleyview())) { if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN) {
priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3"); priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
if (IS_ERR(priv->mclk)) { if (IS_ERR(priv->mclk)) {
ret_val = PTR_ERR(priv->mclk); ret_val = PTR_ERR(priv->mclk);

2
sound/soc/intel/boards/cht_bsw_rt5645.c
View File

@ -682,7 +682,6 @@ static int snd_cht_mc_probe(struct platform_device *pdev)
cht_rt5645_cpu_dai_name; cht_rt5645_cpu_dai_name;
} }
if (is_valleyview()) {
drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3"); drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
if (IS_ERR(drv->mclk)) { if (IS_ERR(drv->mclk)) {
dev_err(&pdev->dev, dev_err(&pdev->dev,
@ -690,7 +689,6 @@ static int snd_cht_mc_probe(struct platform_device *pdev)
PTR_ERR(drv->mclk)); PTR_ERR(drv->mclk));
return PTR_ERR(drv->mclk); return PTR_ERR(drv->mclk);
} }
}
snd_soc_card_set_drvdata(card, drv); snd_soc_card_set_drvdata(card, drv);
ret_val = devm_snd_soc_register_card(&pdev->dev, card); ret_val = devm_snd_soc_register_card(&pdev->dev, card);

15
sound/soc/intel/boards/cht_bsw_rt5672.c
View File

@ -20,7 +20,6 @@
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <asm/cpu_device_id.h>
#include <sound/pcm.h> #include <sound/pcm.h>
#include <sound/pcm_params.h> #include <sound/pcm_params.h>
#include <sound/soc.h> #include <sound/soc.h>
@ -394,18 +393,6 @@ static struct snd_soc_card snd_soc_card_cht = {
.resume_post = cht_resume_post, .resume_post = cht_resume_post,
}; };
static bool is_valleyview(void)
{
static const struct x86_cpu_id cpu_ids[] = {
{ X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */
{}
};
if (!x86_match_cpu(cpu_ids))
return false;
return true;
}
#define RT5672_I2C_DEFAULT "i2c-10EC5670:00" #define RT5672_I2C_DEFAULT "i2c-10EC5670:00"
static int snd_cht_mc_probe(struct platform_device *pdev) static int snd_cht_mc_probe(struct platform_device *pdev)
@ -439,7 +426,6 @@ static int snd_cht_mc_probe(struct platform_device *pdev)
} }
} }
if (is_valleyview()) {
drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3"); drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
if (IS_ERR(drv->mclk)) { if (IS_ERR(drv->mclk)) {
dev_err(&pdev->dev, dev_err(&pdev->dev,
@ -447,7 +433,6 @@ static int snd_cht_mc_probe(struct platform_device *pdev)
PTR_ERR(drv->mclk)); PTR_ERR(drv->mclk));
return PTR_ERR(drv->mclk); return PTR_ERR(drv->mclk);
} }
}
snd_soc_card_set_drvdata(&snd_soc_card_cht, drv); snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
/* register the soc card */ /* register the soc card */