mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-03-21 23:16:50 +08:00
Merge tag 'mtd/fixes-for-7.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
Pull MTD fixes from Miquel Raynal: - In SPI NOR, there was an issue with the RDCR capability, leading to several platforms no longer capable of using it for wrong reasons (the follow-up commit renames the helper to avoid future confusion) - NAND controller drivers needed to be improved to fix some timings, a locking schenario and avoid certain operations during panic writes - The Spear600 DT binding conversion was done partially, leading to several warnings which have individually been fixed - Tudor gets replaced by Takahiro for the SPI NOR maintainance - Plus two more misc fixes * tag 'mtd/fixes-for-7.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: mtd: rawnand: pl353: make sure optimal timings are applied mtd: spi-nor: Rename spi_nor_spimem_check_op() mtd: spi-nor: Fix RDCR controller capability core check mtd: rawnand: brcmnand: skip DMA during panic write mtd: rawnand: serialize lock/unlock against other NAND operations dt-bindings: mtd: st,spear600-smi: Fix example dt-bindings: mtd: st,spear600-smi: #address/size-cells is mandatory dt-bindings: mtd: st,spear600-smi: Fix description mtd: rawnand: cadence: Fix error check for dma_alloc_coherent() in cadence_nand_init() mtd: Avoid boot crash in RedBoot partition table parser MAINTAINERS: add Takahiro Kuwano as SPI NOR reviewer MAINTAINERS: remove Tudor Ambarus as SPI NOR maintainer
This commit is contained in:
@@ -19,9 +19,6 @@ description:
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Flash sub nodes describe the memory range and optional per-flash
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properties.
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allOf:
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- $ref: mtd.yaml#
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properties:
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compatible:
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const: st,spear600-smi
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@@ -42,14 +39,29 @@ properties:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Functional clock rate of the SMI controller in Hz.
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patternProperties:
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"^flash@.*$":
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$ref: /schemas/mtd/mtd.yaml#
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properties:
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reg:
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maxItems: 1
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st,smi-fast-mode:
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type: boolean
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description: Indicates that the attached flash supports fast read mode.
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unevaluatedProperties: false
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required:
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- reg
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required:
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- compatible
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- reg
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- clock-rate
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- "#address-cells"
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- "#size-cells"
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unevaluatedProperties: false
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@@ -64,7 +76,7 @@ examples:
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interrupts = <12>;
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clock-rate = <50000000>; /* 50 MHz */
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flash@f8000000 {
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flash@fc000000 {
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reg = <0xfc000000 0x1000>;
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st,smi-fast-mode;
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};
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@@ -24902,9 +24902,9 @@ F: drivers/clk/spear/
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F: drivers/pinctrl/spear/
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SPI NOR SUBSYSTEM
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M: Tudor Ambarus <tudor.ambarus@linaro.org>
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M: Pratyush Yadav <pratyush@kernel.org>
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M: Michael Walle <mwalle@kernel.org>
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R: Takahiro Kuwano <takahiro.kuwano@infineon.com>
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L: linux-mtd@lists.infradead.org
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S: Maintained
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W: http://www.linux-mtd.infradead.org/
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@@ -2350,14 +2350,12 @@ static int brcmnand_write(struct mtd_info *mtd, struct nand_chip *chip,
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for (i = 0; i < ctrl->max_oob; i += 4)
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oob_reg_write(ctrl, i, 0xffffffff);
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if (mtd->oops_panic_write)
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if (mtd->oops_panic_write) {
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/* switch to interrupt polling and PIO mode */
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disable_ctrl_irqs(ctrl);
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if (use_dma(ctrl) && (has_edu(ctrl) || !oob) && flash_dma_buf_ok(buf)) {
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} else if (use_dma(ctrl) && (has_edu(ctrl) || !oob) && flash_dma_buf_ok(buf)) {
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if (ctrl->dma_trans(host, addr, (u32 *)buf, oob, mtd->writesize,
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CMD_PROGRAM_PAGE))
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ret = -EIO;
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goto out;
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@@ -3133,7 +3133,7 @@ static int cadence_nand_init(struct cdns_nand_ctrl *cdns_ctrl)
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sizeof(*cdns_ctrl->cdma_desc),
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&cdns_ctrl->dma_cdma_desc,
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GFP_KERNEL);
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if (!cdns_ctrl->dma_cdma_desc)
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if (!cdns_ctrl->cdma_desc)
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return -ENOMEM;
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cdns_ctrl->buf_size = SZ_16K;
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@@ -4737,11 +4737,16 @@ static void nand_shutdown(struct mtd_info *mtd)
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static int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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int ret;
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if (!chip->ops.lock_area)
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return -ENOTSUPP;
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return chip->ops.lock_area(chip, ofs, len);
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nand_get_device(chip);
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ret = chip->ops.lock_area(chip, ofs, len);
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nand_release_device(chip);
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return ret;
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}
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/**
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@@ -4753,11 +4758,16 @@ static int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
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static int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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int ret;
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if (!chip->ops.unlock_area)
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return -ENOTSUPP;
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return chip->ops.unlock_area(chip, ofs, len);
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nand_get_device(chip);
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ret = chip->ops.unlock_area(chip, ofs, len);
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nand_release_device(chip);
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return ret;
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}
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/* Set default functions */
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@@ -862,6 +862,9 @@ static int pl35x_nfc_setup_interface(struct nand_chip *chip, int cs,
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PL35X_SMC_NAND_TAR_CYCLES(tmgs.t_ar) |
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PL35X_SMC_NAND_TRR_CYCLES(tmgs.t_rr);
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writel(plnand->timings, nfc->conf_regs + PL35X_SMC_CYCLES);
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pl35x_smc_update_regs(nfc);
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return 0;
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}
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@@ -270,9 +270,9 @@ nogood:
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strcpy(names, fl->img->name);
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#ifdef CONFIG_MTD_REDBOOT_PARTS_READONLY
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if (!memcmp(names, "RedBoot", 8) ||
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!memcmp(names, "RedBoot config", 15) ||
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!memcmp(names, "FIS directory", 14)) {
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if (!strcmp(names, "RedBoot") ||
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!strcmp(names, "RedBoot config") ||
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!strcmp(names, "FIS directory")) {
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parts[i].mask_flags = MTD_WRITEABLE;
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}
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#endif
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@@ -2345,14 +2345,14 @@ int spi_nor_hwcaps_pp2cmd(u32 hwcaps)
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}
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/**
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* spi_nor_spimem_check_op - check if the operation is supported
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* by controller
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* spi_nor_spimem_check_read_pp_op - check if a read or a page program operation is
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* supported by controller
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*@nor: pointer to a 'struct spi_nor'
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*@op: pointer to op template to be checked
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*
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* Returns 0 if operation is supported, -EOPNOTSUPP otherwise.
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*/
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static int spi_nor_spimem_check_op(struct spi_nor *nor,
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static int spi_nor_spimem_check_read_pp_op(struct spi_nor *nor,
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struct spi_mem_op *op)
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{
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/*
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@@ -2396,7 +2396,7 @@ static int spi_nor_spimem_check_readop(struct spi_nor *nor,
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if (spi_nor_protocol_is_dtr(nor->read_proto))
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op.dummy.nbytes *= 2;
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return spi_nor_spimem_check_op(nor, &op);
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return spi_nor_spimem_check_read_pp_op(nor, &op);
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}
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/**
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@@ -2414,7 +2414,7 @@ static int spi_nor_spimem_check_pp(struct spi_nor *nor,
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spi_nor_spimem_setup_op(nor, &op, pp->proto);
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return spi_nor_spimem_check_op(nor, &op);
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return spi_nor_spimem_check_read_pp_op(nor, &op);
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}
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/**
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@@ -2466,7 +2466,7 @@ spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, u32 *hwcaps)
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spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
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if (spi_nor_spimem_check_op(nor, &op))
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if (!spi_mem_supports_op(nor->spimem, &op))
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nor->flags |= SNOR_F_NO_READ_CR;
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}
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}
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