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Code

gpio: en7523: use new generic GPIO chip API

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Convert the driver to using the new generic GPIO chip interfaces from
linux/gpio/generic.h.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250702-gpio-mmio-rework-v2-8-6b77aab684d8@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
This commit is contained in:
Bartosz Golaszewski 2025-07-02 11:22:15 +02:00
parent bd9a0dec2d
commit 34c029c203
1 changed files with 18 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

36
drivers/gpio/gpio-en7523.c
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@ -4,6 +4,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <linux/bits.h> #include <linux/bits.h>
#include <linux/gpio/driver.h> #include <linux/gpio/driver.h>
#include <linux/gpio/generic.h>
#include <linux/mod_devicetable.h> #include <linux/mod_devicetable.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
@ -13,28 +14,23 @@
/** /**
* struct airoha_gpio_ctrl - Airoha GPIO driver data * struct airoha_gpio_ctrl - Airoha GPIO driver data
* @gc: Associated gpio_chip instance. * @gen_gc: Associated gpio_generic_chip instance.
* @data: The data register. * @data: The data register.
* @dir: [0] The direction register for the lower 16 pins. * @dir: [0] The direction register for the lower 16 pins.
* [1]: The direction register for the higher 16 pins. * [1]: The direction register for the higher 16 pins.
* @output: The output enable register. * @output: The output enable register.
*/ */
struct airoha_gpio_ctrl { struct airoha_gpio_ctrl {
struct gpio_chip gc; struct gpio_generic_chip gen_gc;
void __iomem *data; void __iomem *data;
void __iomem *dir[2]; void __iomem *dir[2];
void __iomem *output; void __iomem *output;
}; };
static struct airoha_gpio_ctrl *gc_to_ctrl(struct gpio_chip *gc)
{
return container_of(gc, struct airoha_gpio_ctrl, gc);
}
static int airoha_dir_set(struct gpio_chip *gc, unsigned int gpio, static int airoha_dir_set(struct gpio_chip *gc, unsigned int gpio,
int val, int out) int val, int out)
{ {
struct airoha_gpio_ctrl *ctrl = gc_to_ctrl(gc); struct airoha_gpio_ctrl *ctrl = gpiochip_get_data(gc);
u32 dir = ioread32(ctrl->dir[gpio / 16]); u32 dir = ioread32(ctrl->dir[gpio / 16]);
u32 output = ioread32(ctrl->output); u32 output = ioread32(ctrl->output);
u32 mask = BIT((gpio % 16) * 2); u32 mask = BIT((gpio % 16) * 2);
@ -50,7 +46,7 @@ static int airoha_dir_set(struct gpio_chip *gc, unsigned int gpio,
iowrite32(dir, ctrl->dir[gpio / 16]); iowrite32(dir, ctrl->dir[gpio / 16]);
if (out) if (out)
gc->set_rv(gc, gpio, val); gpio_generic_chip_set(&ctrl->gen_gc, gpio, val);
iowrite32(output, ctrl->output); iowrite32(output, ctrl->output);
@ -70,7 +66,7 @@ static int airoha_dir_in(struct gpio_chip *gc, unsigned int gpio)
static int airoha_get_dir(struct gpio_chip *gc, unsigned int gpio) static int airoha_get_dir(struct gpio_chip *gc, unsigned int gpio)
{ {
struct airoha_gpio_ctrl *ctrl = gc_to_ctrl(gc); struct airoha_gpio_ctrl *ctrl = gpiochip_get_data(gc);
u32 dir = ioread32(ctrl->dir[gpio / 16]); u32 dir = ioread32(ctrl->dir[gpio / 16]);
u32 mask = BIT((gpio % 16) * 2); u32 mask = BIT((gpio % 16) * 2);
@ -79,6 +75,7 @@ static int airoha_get_dir(struct gpio_chip *gc, unsigned int gpio)
static int airoha_gpio_probe(struct platform_device *pdev) static int airoha_gpio_probe(struct platform_device *pdev)
{ {
struct gpio_generic_chip_config config = { };
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
struct airoha_gpio_ctrl *ctrl; struct airoha_gpio_ctrl *ctrl;
int err; int err;
@ -103,18 +100,21 @@ static int airoha_gpio_probe(struct platform_device *pdev)
if (IS_ERR(ctrl->output)) if (IS_ERR(ctrl->output))
return PTR_ERR(ctrl->output); return PTR_ERR(ctrl->output);
err = bgpio_init(&ctrl->gc, dev, 4, ctrl->data, NULL, config.dev = dev;
NULL, NULL, NULL, 0); config.sz = 4;
config.dat = ctrl->data;
err = gpio_generic_chip_init(&ctrl->gen_gc, &config);
if (err) if (err)
return dev_err_probe(dev, err, "unable to init generic GPIO"); return dev_err_probe(dev, err, "unable to init generic GPIO");
ctrl->gc.ngpio = AIROHA_GPIO_MAX; ctrl->gen_gc.gc.ngpio = AIROHA_GPIO_MAX;
ctrl->gc.owner = THIS_MODULE; ctrl->gen_gc.gc.owner = THIS_MODULE;
ctrl->gc.direction_output = airoha_dir_out; ctrl->gen_gc.gc.direction_output = airoha_dir_out;
ctrl->gc.direction_input = airoha_dir_in; ctrl->gen_gc.gc.direction_input = airoha_dir_in;
ctrl->gc.get_direction = airoha_get_dir; ctrl->gen_gc.gc.get_direction = airoha_get_dir;
return devm_gpiochip_add_data(dev, &ctrl->gc, ctrl); return devm_gpiochip_add_data(dev, &ctrl->gen_gc.gc, ctrl);
} }
static const struct of_device_id airoha_gpio_of_match[] = { static const struct of_device_id airoha_gpio_of_match[] = {