parisc: Flush correct cache in cacheflush() syscall

The assembly flush instructions were swapped for I- and D-cache flags:

SYSCALL_DEFINE3(cacheflush, ...)
{
	if (cache & DCACHE) {
			"fic ...\n"
	}
	if (cache & ICACHE && error == 0) {
			"fdc ...\n"
	}

Fix it by using fdc for DCACHE, and fic for ICACHE flushing.

Reported-by: Felix Lechner <felix.lechner@lease-up.com>
Fixes: c6d96328fe ("parisc: Add cacheflush() syscall")
Cc: <stable@vger.kernel.org> # v6.5+
Signed-off-by: Helge Deller <deller@gmx.de>
This commit is contained in:
Helge Deller
2026-03-09 15:16:37 +01:00
parent 1f318b96cc
commit 2c98a8fbd6

View File

@@ -953,7 +953,7 @@ SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,
#else #else
"1: cmpb,<<,n %0,%2,1b\n" "1: cmpb,<<,n %0,%2,1b\n"
#endif #endif
" fic,m %3(%4,%0)\n" " fdc,m %3(%4,%0)\n"
"2: sync\n" "2: sync\n"
ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b, "%1") ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b, "%1")
: "+r" (start), "+r" (error) : "+r" (start), "+r" (error)
@@ -968,7 +968,7 @@ SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,
#else #else
"1: cmpb,<<,n %0,%2,1b\n" "1: cmpb,<<,n %0,%2,1b\n"
#endif #endif
" fdc,m %3(%4,%0)\n" " fic,m %3(%4,%0)\n"
"2: sync\n" "2: sync\n"
ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b, "%1") ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b, "%1")
: "+r" (start), "+r" (error) : "+r" (start), "+r" (error)