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drm/i915/dsb: Use non-posted register writes for legacy LUT
The DSB has problems writing the legacy LUT. The two workarounds I've discoverted are: - write each entry twice back to back - use non-posted writes Let's use non-posted writes as that seems a bit more standard. TODO: measure which is faster Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230606191504.18099-14-ville.syrjala@linux.intel.com Reviewed-by: Uma Shankar <uma.shankar@intel.com>
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@ -1329,9 +1329,20 @@ static void ilk_load_lut_8(const struct intel_crtc_state *crtc_state,
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lut = blob->data;
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lut = blob->data;
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/*
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* DSB fails to correctly load the legacy LUT
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* unless we either write each entry twice,
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* or use non-posted writes
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*/
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if (crtc_state->dsb)
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intel_dsb_nonpost_start(crtc_state->dsb);
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for (i = 0; i < 256; i++)
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for (i = 0; i < 256; i++)
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ilk_lut_write(crtc_state, LGC_PALETTE(pipe, i),
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ilk_lut_write(crtc_state, LGC_PALETTE(pipe, i),
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i9xx_lut_8(&lut[i]));
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i9xx_lut_8(&lut[i]));
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if (crtc_state->dsb)
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intel_dsb_nonpost_end(crtc_state->dsb);
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}
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}
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static void ilk_load_lut_10(const struct intel_crtc_state *crtc_state,
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static void ilk_load_lut_10(const struct intel_crtc_state *crtc_state,
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