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arm64: Expose AIDR_EL1 via sysfs
The KVM PV ABI recently added a feature that allows the VM to discover the set of physical CPU implementations, identified by a tuple of {MIDR_EL1, REVIDR_EL1, AIDR_EL1}. Unlike other KVM PV features, the expectation is that the VMM implements the hypercall instead of KVM as it has the authoritative view of where the VM gets scheduled. To do this the VMM needs to know the values of these registers on any CPU in the system. While MIDR_EL1 and REVIDR_EL1 are already exposed, AIDR_EL1 is not. Provide it in sysfs along with the other identification registers. Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Link: https://lore.kernel.org/r/20250403231626.3181116-1-oliver.upton@linux.dev Signed-off-by: Will Deacon <will@kernel.org>
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@ -485,6 +485,7 @@ What: /sys/devices/system/cpu/cpuX/regs/
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/sys/devices/system/cpu/cpuX/regs/identification/
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/sys/devices/system/cpu/cpuX/regs/identification/
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/sys/devices/system/cpu/cpuX/regs/identification/midr_el1
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/sys/devices/system/cpu/cpuX/regs/identification/midr_el1
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/sys/devices/system/cpu/cpuX/regs/identification/revidr_el1
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/sys/devices/system/cpu/cpuX/regs/identification/revidr_el1
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/sys/devices/system/cpu/cpuX/regs/identification/aidr_el1
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/sys/devices/system/cpu/cpuX/regs/identification/smidr_el1
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/sys/devices/system/cpu/cpuX/regs/identification/smidr_el1
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Date: June 2016
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Date: June 2016
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Contact: Linux ARM Kernel Mailing list <linux-arm-kernel@lists.infradead.org>
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Contact: Linux ARM Kernel Mailing list <linux-arm-kernel@lists.infradead.org>
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@ -72,14 +72,15 @@ there are some issues with their usage.
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process could be migrated to another CPU by the time it uses the
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process could be migrated to another CPU by the time it uses the
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register value, unless the CPU affinity is set. Hence, there is no
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register value, unless the CPU affinity is set. Hence, there is no
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guarantee that the value reflects the processor that it is
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guarantee that the value reflects the processor that it is
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currently executing on. The REVIDR is not exposed due to this
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currently executing on. REVIDR and AIDR are not exposed due to this
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constraint, as REVIDR makes sense only in conjunction with the
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constraint, as these registers only make sense in conjunction with
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MIDR. Alternately, MIDR_EL1 and REVIDR_EL1 are exposed via sysfs
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the MIDR. Alternately, MIDR_EL1, REVIDR_EL1, and AIDR_EL1 are exposed
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at::
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via sysfs at::
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/sys/devices/system/cpu/cpu$ID/regs/identification/
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/sys/devices/system/cpu/cpu$ID/regs/identification/
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\- midr
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\- midr_el1
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\- revidr
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\- revidr_el1
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\- aidr_el1
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3. Implementation
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3. Implementation
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--------------------
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--------------------
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@ -44,6 +44,7 @@ struct cpuinfo_arm64 {
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u64 reg_dczid;
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u64 reg_dczid;
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u64 reg_midr;
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u64 reg_midr;
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u64 reg_revidr;
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u64 reg_revidr;
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u64 reg_aidr;
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u64 reg_gmid;
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u64 reg_gmid;
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u64 reg_smidr;
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u64 reg_smidr;
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u64 reg_mpamidr;
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u64 reg_mpamidr;
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@ -328,11 +328,13 @@ static const struct kobj_type cpuregs_kobj_type = {
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CPUREGS_ATTR_RO(midr_el1, midr);
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CPUREGS_ATTR_RO(midr_el1, midr);
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CPUREGS_ATTR_RO(revidr_el1, revidr);
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CPUREGS_ATTR_RO(revidr_el1, revidr);
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CPUREGS_ATTR_RO(aidr_el1, aidr);
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CPUREGS_ATTR_RO(smidr_el1, smidr);
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CPUREGS_ATTR_RO(smidr_el1, smidr);
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static struct attribute *cpuregs_id_attrs[] = {
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static struct attribute *cpuregs_id_attrs[] = {
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&cpuregs_attr_midr_el1.attr,
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&cpuregs_attr_midr_el1.attr,
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&cpuregs_attr_revidr_el1.attr,
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&cpuregs_attr_revidr_el1.attr,
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&cpuregs_attr_aidr_el1.attr,
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NULL
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NULL
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};
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};
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@ -469,6 +471,7 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)
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info->reg_dczid = read_cpuid(DCZID_EL0);
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info->reg_dczid = read_cpuid(DCZID_EL0);
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info->reg_midr = read_cpuid_id();
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info->reg_midr = read_cpuid_id();
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info->reg_revidr = read_cpuid(REVIDR_EL1);
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info->reg_revidr = read_cpuid(REVIDR_EL1);
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info->reg_aidr = read_cpuid(AIDR_EL1);
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info->reg_id_aa64dfr0 = read_cpuid(ID_AA64DFR0_EL1);
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info->reg_id_aa64dfr0 = read_cpuid(ID_AA64DFR0_EL1);
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info->reg_id_aa64dfr1 = read_cpuid(ID_AA64DFR1_EL1);
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info->reg_id_aa64dfr1 = read_cpuid(ID_AA64DFR1_EL1);
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