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drm/i915/xehpsdv: add initial XeHP SDV definitions

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XeHP SDV is a Intel® dGPU without display. This is just the definition
of some basic platform macros, by large a copy of current state of
Tigerlake which does not reflect the end state of this platform.

v2:
 - Switch to intel_step infrastructure for stepping matches. (Jani)
v3:
 - Bring earlier in patch series and leave addition of new media engines
   to the engine mask for a later patch.

Bspec: 44467, 48077
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210721223043.834562-3-matthew.d.roper@intel.com
This commit is contained in:
Lucas De Marchi 2021-07-21 15:30:27 -07:00 committed by Matt Roper
parent 05eb46384e
commit 086df54e20
6 changed files with 37 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/gpu/drm/i915/i915_drv.h
View File

@ -1391,6 +1391,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define IS_DG1(dev_priv) IS_PLATFORM(dev_priv, INTEL_DG1)
#define IS_ALDERLAKE_S(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_S)
#define IS_ALDERLAKE_P(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_P)
#define IS_XEHPSDV(dev_priv) IS_PLATFORM(dev_priv, INTEL_XEHPSDV)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
#define IS_BDW_ULT(dev_priv) \
@ -1501,6 +1502,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
(IS_ALDERLAKE_P(__i915) && \
IS_GT_STEP(__i915, since, until))
#define IS_XEHPSDV_GT_STEP(p, since, until) \
(IS_XEHPSDV(p) && IS_GT_STEP(__i915, since, until))
#define IS_LP(dev_priv) (INTEL_INFO(dev_priv)->is_lp)
#define IS_GEN9_LP(dev_priv) (GRAPHICS_VER(dev_priv) == 9 && IS_LP(dev_priv))
#define IS_GEN9_BC(dev_priv) (GRAPHICS_VER(dev_priv) == 9 && !IS_LP(dev_priv))

19
drivers/gpu/drm/i915/i915_pci.c
View File

@ -987,6 +987,25 @@ static const struct intel_device_info adl_p_info = {
.ppgtt_size = 48, \
.ppgtt_type = INTEL_PPGTT_FULL
#define XE_HPM_FEATURES \
.media_ver = 12, \
.media_rel = 50
__maybe_unused
static const struct intel_device_info xehpsdv_info = {
XE_HP_FEATURES,
XE_HPM_FEATURES,
DGFX_FEATURES,
PLATFORM(INTEL_XEHPSDV),
.display = { },
.pipe_mask = 0,
.platform_engine_mask =
BIT(RCS0) | BIT(BCS0) |
BIT(VECS0) | BIT(VECS1) |
BIT(VCS0) | BIT(VCS1) | BIT(VCS2) | BIT(VCS3),
.require_force_probe = 1,
};
#undef PLATFORM
/*

1
drivers/gpu/drm/i915/intel_device_info.c
View File

@ -68,6 +68,7 @@ static const char * const platform_names[] = {
PLATFORM_NAME(DG1),
PLATFORM_NAME(ALDERLAKE_S),
PLATFORM_NAME(ALDERLAKE_P),
PLATFORM_NAME(XEHPSDV),
};
#undef PLATFORM_NAME

1
drivers/gpu/drm/i915/intel_device_info.h
View File

@ -88,6 +88,7 @@ enum intel_platform {
INTEL_DG1,
INTEL_ALDERLAKE_S,
INTEL_ALDERLAKE_P,
INTEL_XEHPSDV,
INTEL_MAX_PLATFORMS
};

12
drivers/gpu/drm/i915/intel_step.c
View File

@ -101,6 +101,13 @@ static const struct intel_step_info adlp_revids[] = {
[0xC] = { .gt_step = STEP_C0, .display_step = STEP_D0 },
};
static const struct intel_step_info xehpsdv_revids[] = {
[0x0] = { .gt_step = STEP_A0 },
[0x1] = { .gt_step = STEP_A1 },
[0x4] = { .gt_step = STEP_B0 },
[0x8] = { .gt_step = STEP_C0 },
};
void intel_step_init(struct drm_i915_private *i915)
{
const struct intel_step_info *revids = NULL;
@ -108,7 +115,10 @@ void intel_step_init(struct drm_i915_private *i915)
int revid = INTEL_REVID(i915);
struct intel_step_info step = {};
if (IS_ALDERLAKE_P(i915)) {
if (IS_XEHPSDV(i915)) {
revids = xehpsdv_revids;
size = ARRAY_SIZE(xehpsdv_revids);
} else if (IS_ALDERLAKE_P(i915)) {
revids = adlp_revids;
size = ARRAY_SIZE(adlp_revids);
} else if (IS_ALDERLAKE_S(i915)) {

1
drivers/gpu/drm/i915/intel_step.h
View File

@ -22,6 +22,7 @@ struct intel_step_info {
enum intel_step {
STEP_NONE = 0,
STEP_A0,
STEP_A1,
STEP_A2,
STEP_B0,
STEP_B1,